<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: iMXRT1052 Link Application to RAM in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082506#M9252</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Johann,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What version of the SDK are you using? I ran some tests on the newest version available (2.7) and I wasn't able to reproduce the behavior that you mentioned.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Victor&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 29 Jun 2020 23:39:41 GMT</pubDate>
    <dc:creator>victorjimenez</dc:creator>
    <dc:date>2020-06-29T23:39:41Z</dc:date>
    <item>
      <title>iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082503#M9249</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a question regarding the linker option: "Link application to RAM" when using Managed Linker Scripts in MCUXpresso IDE (v10.3.1 [Build 2233] [2019-02-20]&amp;nbsp;Manifest for SDK SDK_2.x_EVKB-IMXRT1050 V 2.5.1).&lt;/P&gt;&lt;DIV class=""&gt;&lt;H2&gt;&lt;BR /&gt;&lt;/H2&gt;&lt;/DIV&gt;&lt;P&gt;When i look at the resulting map file i can see that the resulting image starts at 0x20000000 which is the beginning of the DTCM-RAM.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the Reference Manual it says under "9.6.1.3 FlexSPI NOR boot flow chart" (the image is loaded from a FlexSPI NOR-Flash)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/113680iA431993F9A5C4110/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;that the image is copied to the OCRAM.&amp;nbsp;&lt;/P&gt;&lt;P&gt;So my questions are:&lt;/P&gt;&lt;P&gt;1. Why is the application liked to the DTCM and not to OCRAM?&lt;/P&gt;&lt;P&gt;2. How exactly does the ROM-code figure out that the image is XIP?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much,&lt;/P&gt;&lt;P&gt;Johann&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2020 15:54:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082503#M9249</guid>
      <dc:creator>jh1</dc:creator>
      <dc:date>2020-06-23T15:54:24Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082504#M9250</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;Johann,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;1. Why is the application liked to the DTCM and not to OCRAM?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;When you select the option Link application to Ram in MCUXpresso IDE, the IDE will put the application in the first RAM block that if fines, which is the DTCM. You can easily modify this on the MCU settings of the project. By default you have the following settings:&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/113913iC0A47957D6F4AEE0/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;If you want to place the application on the OCRAM memory you will need to select it and send it all the way below the BOARD_FLASH, like shown below:&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/113914i7AB7EB5B430E6547/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2. How exactly does the ROM-code figure out that the image is XIP?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;This is determined by the address that you use when building your application. If when you compile the image you select the FlexSPI address then it detects that the image is XIP, but when you select the internal RAM then it detects that it's non XIP because the address is not from the FlexSPI memory mapped.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;/P&gt;&lt;P&gt;Victor&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note:&lt;/P&gt;&lt;P&gt;- If this post answers your question, please click the "Mark Correct"button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/P&gt;&lt;P&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2020 23:29:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082504#M9250</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-06-25T23:29:22Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082505#M9251</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Victor,&lt;/P&gt;&lt;P&gt;thx for the clarifications.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I stumbled upon an issue regarding Link to RAM. I was playing around with the exkbimxrt1050_flexram_ram_access - sample. If i execute the code from NOR-Flash everything is as expected but if i use "Link to RAM" and execute the&amp;nbsp;&lt;/P&gt;&lt;P&gt;code from ITCM (or DTCM, doesn't matter) the application somehow gets stuck.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It does enter the&amp;nbsp;APP_FLEXRAM_IRQ_HANDLER but then the final printf statement&amp;nbsp;&lt;/P&gt;&lt;P&gt;PRINTF("\r\nOCRAM access 0x%x to boundary.\r\n", (uint32_t)(ocramAddr));&lt;/P&gt;&lt;P&gt;is not executed. The application also doesn't exit from the loop in&amp;nbsp;OCRAM_Access().&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If i uncheck the "Link application to RAM" box everything is normal again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Johann&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jun 2020 15:11:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082505#M9251</guid>
      <dc:creator>jh1</dc:creator>
      <dc:date>2020-06-29T15:11:53Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082506#M9252</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Johann,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What version of the SDK are you using? I ran some tests on the newest version available (2.7) and I wasn't able to reproduce the behavior that you mentioned.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Victor&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jun 2020 23:39:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082506#M9252</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-06-29T23:39:41Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082507#M9253</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Victor,&lt;/P&gt;&lt;P&gt;as mentioned above i'm using&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;SDK SDK_2.x_EVKB-IMXRT1050 V 2.5.1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Are you sure you tried with the NOR-Flash (not the Hyperflash) incl. the necessary adjustments regarding driver and xip.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I use&amp;nbsp;MIMXRT1050-EVK_IS25WP064A.cfx&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;and the following config&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;(in evkbimxrt1050_flexspi_nor_config.c):&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;const flexspi_nor_config_t qspiflash_config = {&lt;BR /&gt; .memConfig =&lt;BR /&gt; {&lt;BR /&gt; .tag = FLEXSPI_CFG_BLK_TAG,&lt;BR /&gt; .version = FLEXSPI_CFG_BLK_VERSION,&lt;BR /&gt; .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,&lt;BR /&gt;// .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,&lt;BR /&gt; .csHoldTime = 3u,&lt;BR /&gt; .csSetupTime = 3u,&lt;BR /&gt; .sflashPadType = kSerialFlash_4Pads,&lt;BR /&gt;// .serialClkFreq = kFlexSpiSerialClk_100MHz,&lt;BR /&gt; .serialClkFreq = kFlexSpiSerialClk_133MHz,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; .sflashA1Size = 8u * 1024u * 1024u,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; .lookupTable =&lt;BR /&gt; {&lt;BR /&gt; // Read LUTs&lt;BR /&gt; FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),&lt;BR /&gt; FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),&lt;BR /&gt; },&lt;BR /&gt; },&lt;BR /&gt; .pageSize = 256u,&lt;BR /&gt; .sectorSize = 4u * 1024u,&lt;BR /&gt; .blockSize = 256u * 1024u,&lt;BR /&gt; .isUniformBlockSize = false,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Johann&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jun 2020 09:55:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082507#M9253</guid>
      <dc:creator>jh1</dc:creator>
      <dc:date>2020-06-30T09:55:53Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082508#M9254</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Johann,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have my EVK configured to boot from the Hyperflash, not the QSPI flash, but since the problem is when you select the option "Link Application to RAM" it doesn't matter which external memory you have configured.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please try to reproduce this issue with version 2.7.0 of the SDK?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards, &lt;BR /&gt;Victor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Jul 2020 16:30:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082508#M9254</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-07-06T16:30:35Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082509#M9255</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Victor,&lt;/P&gt;&lt;P&gt;i tried the sample with MCUXpresso 11.1.1 and SDK 2.7.0 -&amp;gt; same issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I figured out what the problem was:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Linked to DTCM:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/114973i9CABFA83C70AC3F8/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The ocramAddr-pointer is itself located inside the ocram and will be set back with&lt;/P&gt;&lt;P&gt;*ocramAddr = 0xCC; when it reaches its own location creating an endless loop.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Flash - Version works because the pointer is located in DTCM:&lt;/P&gt;&lt;P&gt;Linked to NOR-Flash:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/114974iA84F95DCEC9B8D6D/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In this case the pointer is correctly located on the stack (0x20020000 - 0x2001f000).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I don't really understand why this is happening.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Johann&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2020 11:59:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082509#M9255</guid>
      <dc:creator>jh1</dc:creator>
      <dc:date>2020-07-08T11:59:57Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT1052 Link Application to RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082510#M9256</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Johann,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I made more tests on my side and I'm still unable to reproduce the behavior that you mentioned. In my case, the example works fine even if select the option Link application to RAM. I'm also using the SDK 2.7 to make these tests and I'm using the onboard debugger with the CMSIS firmware, what debugger are you using? Is there anything I'm missing in my test environment?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Victor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Jul 2020 19:03:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1052-Link-Application-to-RAM/m-p/1082510#M9256</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-07-09T19:03:48Z</dc:date>
    </item>
  </channel>
</rss>

