<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: i.mx rt1050 booting from LPSPI in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795253#M825</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;OK, thanx, that info helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 20 Jun 2018 11:04:38 GMT</pubDate>
    <dc:creator>christiangradl</dc:creator>
    <dc:date>2018-06-20T11:04:38Z</dc:date>
    <item>
      <title>i.mx rt1050 booting from LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795249#M821</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;What are the exact bootmode/pins settings for booting via LPSPI?&lt;/P&gt;&lt;P&gt;in the TRM table 8-8 there is no entry about this.&lt;/P&gt;&lt;P&gt;Above there stands&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN class=""&gt;The chip supports these boot flash devices&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN class=""&gt;Serial NOR/EEPROM boot via LPSPI&lt;/SPAN&gt; &lt;BR style="font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: -webkit-auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;" /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Jun 2018 13:41:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795249#M821</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-06-19T13:41:53Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 booting from LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795250#M822</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Christian&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pinmux settings are given in Table 8-1. ROM Bootloader Peripheral PinMux&lt;BR /&gt;i.MX RT1050 Processor Reference Manual&lt;/P&gt;&lt;P&gt;Boot mode only using fuse mode as shows Table 8-35 (there is no GPIO override mode), &lt;BR /&gt;fuse selections are given in Table 5-9. Fusemap Descriptions i.MX RT1050 Processor &lt;BR /&gt;Reference Manual &lt;BR /&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMXRT1050RM.pdf" rel="nofollow" target="_blank"&gt;https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Jun 2018 22:51:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795250#M822</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-06-19T22:51:55Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 booting from LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795251#M823</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;in table 5-9 there is no definition for booting woth LPSPI. Register 0x450[7:0]???&lt;/P&gt;&lt;P&gt;I can select the LPSPI chipselect register 0x6D0, but how can i select the boot device for LPSPI,&lt;/P&gt;&lt;P&gt;as described in chapter 8-2&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN class=""&gt;The boot ROM supports these boot devices:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• Serial NOR Flash via FlexSPI&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• Serial NAND Flash via FlexSPI&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• Parallel NOR Flash via SEMC&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• RAWNAND Flash via SEMC&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• SD/MMC&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;• SPI NOR/EEPROM via LPSPI&lt;/SPAN&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Jun 2018 03:33:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795251#M823</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-06-20T03:33:51Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 booting from LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795252#M824</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;boot ROM uses it as recovery device using one of the LPSPI ports,&lt;/P&gt;&lt;P&gt;please check description in sect.8.10 Recovery devices&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Jun 2018 10:34:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795252#M824</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-06-20T10:34:45Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 booting from LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795253#M825</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;OK, thanx, that info helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Jun 2018 11:04:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-booting-from-LPSPI/m-p/795253#M825</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-06-20T11:04:38Z</dc:date>
    </item>
  </channel>
</rss>

