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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Imxrt1064 hardfault handler error in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042554#M7659</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;What is the pointer "data" assigned (pointing) to ?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 14 Jun 2020 15:58:08 GMT</pubDate>
    <dc:creator>carstengroen</dc:creator>
    <dc:date>2020-06-14T15:58:08Z</dc:date>
    <item>
      <title>Imxrt1064 hardfault handler error</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042553#M7658</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Board = IMXRT1064 evk&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM = OCRAM&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Disabled:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SCB_DisableICache(); &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SCB_DisableDCache();&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; When we trying to access structure that time hard fault error occurring.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Example :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;typedef struct test_stat_t
{
    uint8_t ip_status;
    uint8_t test_data1;
    uint8_t test_data2;
}test_stat;



void *test_thread(void *arg)
{
   test_stat *data;

   data-&amp;gt;ip_status = 1;          // Occurs hardfault handler error 
   data-&amp;gt;test_data1 = 10;        // Occurs hardfault handler error 
   data-&amp;gt;test_data2 = 20;        // Occurs hardfault handler error 



}
&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This thread stack size increased upto 5k but still this error occurs.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; This code syntactically correct but why hard fault error occurs ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; If we run application on OCRAM (or) SDRAM what are memory configuration we have to change including lwip ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; How to solve this issue ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Vasu&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 13 Jun 2020 16:55:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042553#M7658</guid>
      <dc:creator>vasudhevan</dc:creator>
      <dc:date>2020-06-13T16:55:49Z</dc:date>
    </item>
    <item>
      <title>Re: Imxrt1064 hardfault handler error</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042554#M7659</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;What is the pointer "data" assigned (pointing) to ?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 14 Jun 2020 15:58:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042554#M7659</guid>
      <dc:creator>carstengroen</dc:creator>
      <dc:date>2020-06-14T15:58:08Z</dc:date>
    </item>
    <item>
      <title>Re: Imxrt1064 hardfault handler error</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042555#M7660</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The code&lt;/P&gt;&lt;PRE class=""&gt;&lt;CODE&gt;&amp;nbsp;&amp;nbsp; test_stat *data;

&amp;nbsp;&amp;nbsp; data-&amp;gt;ip_status = 1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Occurs hardfault handler error &lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;may not give a compiler "error" but I'm certain that there is a compiler "warning" about using an uninitialised pointer that is &lt;EM&gt;almost certainly going to cause a hard fault&lt;/EM&gt; (or random undefined behavior) when executed. Or is the "example" not accurate???&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 14 Jun 2020 17:27:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1042555#M7660</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2020-06-14T17:27:34Z</dc:date>
    </item>
    <item>
      <title>Re: Imxrt1064 hardfault handler error</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1241555#M13045</link>
      <description>&lt;P&gt;Maybe an Unaligned error， so Please check the MPU configuration.&lt;/P&gt;</description>
      <pubDate>Mon, 08 Mar 2021 07:09:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Imxrt1064-hardfault-handler-error/m-p/1241555#M13045</guid>
      <dc:creator>crist_xu</dc:creator>
      <dc:date>2021-03-08T07:09:48Z</dc:date>
    </item>
  </channel>
</rss>

