topic Re: i.MX RT LPSPI in Quad mode in i.MX RT Crossover MCUs

i.MX RT LPSPI in Quad mode

nda — Sat, 16 Nov 2019 11:02:43 GMT

Hello to everyone. I need to use LPSPI in Quad mode. Drivers from original example (evkmimxrt1020_cmsis_lpspi_int_b2b_transfer_master) don't support quad mode at all. I've set PCSCFG bit in CFGR1 register and transfer width in TCR. After that module works int 4 bit mode. It transfers data in right manner, but i dont understand how to read data in that mode, because D0-D3 should become inputs for reading. Does anybody have any ideas(examples) for quad mode?

Re: i.MX RT LPSPI in Quad mode

jingpan — Tue, 19 Nov 2019 08:07:50 GMT

Hi Dmitriy,

This is controlled by LPSPI_TCR[RXMSK, TXMSK, WIDTH]. For example, if you want do a 4bit read, you should set WIDTH=10 and TXMSK=1. If you want do a 4bit write, you should set RXMSK=1 and WIDTH=10.

I can't find any example. Hope this can help.

Regards,

Jing

Re: i.MX RT LPSPI in Quad mode

nda — Tue, 19 Nov 2019 19:38:31 GMT

Thank you for your answer. That helped a little. Now i can send and receive data, but the problem is not solved. Now the problem is in the folowing: When i send data - everything is ok, but when i am triyng to read - the data is incorrect. While reading data - D1 is used as D0, and D0 is used as D1. So instead of 0x20 (as i can see by oscilloscope), i will get 0x10. I dont understand how to handle this.

P.S. masterConfig.pinCfg = kLPSPI_SdoInSdoOut;

Re: i.MX RT LPSPI in Quad mode

jingpan — Wed, 20 Nov 2019 06:56:56 GMT

Hi,

Can you share your schematic? I guess SOUT/SIN connection is reversed. When you set masterConfig.pinCfg = kLPSPI_SdoInSdoOut; SIN will also send data to Flash MOSI pin. Thus flash can ack your command.

Regards,

Jing

Re: i.MX RT LPSPI in Quad mode

nda — Wed, 20 Nov 2019 09:39:38 GMT

Hello Jing Pan. I am using MIMXRT1020-EVK. I am trying to connect to MT25QL128ABA1EW9-0SIT. Firstly i change flash mode from ordinary SPI to Quad. For doing that i use LPSPI3. Connection is the folowing:

MXRT1020 MT25QL128ABA1EW9-0SIT

PCS0 - [76] GPIO_AD_B1_13 - as chip select S# [1]

SCK - [78] GPIO_AD_B1_12 - as clock С [6]

SDI - [74] GPIO_AD_B1_15 DQ1[2]

SDO - [75] GPIO_AD_B1_14 DQ0[5]

PCS2-[82] GPIO_AD_B1_08 W#/DQ2[3]

PCS3-[83] GPIO_AD_B1_07 DQ3/HOLD#[7]

From flash datasheet: "When using legacy (x1) SPI commands in extended I/O protocol (XIO-SPI), DQ0 is an input and
DQ1 is an output." So, the connection is ok.

In 1x SPI it works well. I can read Device ID and it is correct.

After changing flash mode to Quad (4x) i send to it ReadDevIdCmd in quad mode and it answers correctly (as i can see from oscilloscope). FlashIC sends the same data as in 1x mode but as i can see from the buffer data is incorrect. All bits from D0 are read as from D1 and vice versa.

Master received(SingleCH):
20 BA 18 10 40 0 72 28 98 0 1 20

Master received(Quad):

10 B9 28 20 40 0 71 18 A8 0 2 10

In Quad mode ReadIDCmd = 0xAF. If SOUT/SIN connection is reversed FlashIC will not respond neither in the single chanel mode nor in the Quad chanel.

Re: i.MX RT LPSPI in Quad mode

nda — Wed, 20 Nov 2019 12:32:41 GMT

The problem is solved. That was the reason: masterConfig.pinCfg = kLPSPI_SdoInSdoOut. Because of that D0 and D1 were reversed. For correct operation use this masterConfig.pinCfg = kLPSPI_SdiInSdoOut and do not forget to set CFGR1[OUTCFG]!!!

P.S. My colleagues from Symmetron Group adviced to read https://www.nxp.com/docs/en/application-note/AN5320.pdf I've found there some answers for my questions. Thanks them for that advice.