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    <title>topic Re: i.mx RT1050 LPSPI in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777188#M570</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;you wrote LPSI Max Freq is 30 Mhz.&lt;BR /&gt;In the datasheet i found that the min data setup time is 18ns =&amp;gt; 27,7 Mhz&lt;/P&gt;&lt;P&gt;What is now the correct max. freq for LPSPI&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanx&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 26 Nov 2018 11:30:11 GMT</pubDate>
    <dc:creator>christiangradl</dc:creator>
    <dc:date>2018-11-26T11:30:11Z</dc:date>
    <item>
      <title>i.mx RT1050 LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777185#M567</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;wthats the max. clock freq of the lpspi. in the manual i found&lt;/P&gt;&lt;TABLE width="78"&gt;&lt;TBODY&gt;&lt;TR style="height: 25px;"&gt;&lt;TD style="width: 70px; height: 25px;"&gt;&lt;SPAN class=""&gt;f&lt;/SPAN&gt;&lt;SPAN class="" style="font-size: 7pt;"&gt;periph &lt;/SPAN&gt;&lt;SPAN class=""&gt;/ 2&lt;/SPAN&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="width: 70px;"&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;in note 1 there stands&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN class=""&gt;f&lt;/SPAN&gt;&lt;SPAN class="" style="font-size: 7pt;"&gt;periph &lt;/SPAN&gt;&lt;SPAN class=""&gt;= 60 MHz, maximum frequency of operation is 30 MHz&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;but in the RM table 18-4 there stands &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;LPSPI_CLK_ROOT&amp;nbsp; 120 MHz&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;what is now the maximum freq for the lpspi clock?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Jun 2018 12:00:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777185#M567</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-06-12T12:00:29Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx RT1050 LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777186#M568</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Christian,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in Figure 18-2. Clock Tree - Part 1 you can see that &lt;SPAN class=""&gt;LPSPI_CLK_ROOT&lt;/SPAN&gt; has a divisor /4 before output. So that matches with what you say above&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LPSPI MAX Freq = fperiph / 2 = &lt;SPAN class=""&gt;LPSPI_CLK_ROOT&lt;/SPAN&gt; / 4 = 30 MHz&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Carlos&lt;BR /&gt;NXP Technical Support&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Jun 2018 21:36:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777186#M568</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2018-06-14T21:36:48Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx RT1050 LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777187#M569</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;i can see is the divisor is before the output, thats right, but the&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;max LPSPI_CLK_ROOT Freq is 120 MHz (table 18-4). So for my calculation i do not this divisor, because max. LSPI Freq is 120 MHz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I have an SPI Device that can communicate with 180 MHz via SPI.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;In "IMXRT1050IEC.pdf" in table 56 there is a note 1, that says 30 MHz. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Is this an example or the absolute output freq that i.mxrt1050 can do?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jun 2018 04:19:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777187#M569</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-06-15T04:19:11Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx RT1050 LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777188#M570</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;you wrote LPSI Max Freq is 30 Mhz.&lt;BR /&gt;In the datasheet i found that the min data setup time is 18ns =&amp;gt; 27,7 Mhz&lt;/P&gt;&lt;P&gt;What is now the correct max. freq for LPSPI&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanx&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Nov 2018 11:30:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777188#M570</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-11-26T11:30:11Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx RT1050 LPSPI</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777189#M571</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Not sure if you have your answer yet.&amp;nbsp; In IMXRT1050RM, Rev. 2, 11/2018, Table 13-5 on page 1000, says that LPSPI_CLK_ROOT defaults to 6MHz and has a maximum of 132MHz.&amp;nbsp; (PLL2 / 4, 528 / 4 = 132).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 11 Aug 2019 00:09:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-RT1050-LPSPI/m-p/777189#M571</guid>
      <dc:creator>wre</dc:creator>
      <dc:date>2019-08-11T00:09:32Z</dc:date>
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