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    <title>topic Re: Getting board SDRAM working with RT1050EVKB in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954302#M4406</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/jeremyzhou"&gt;jeremyzhou&lt;/A&gt;&lt;/P&gt;&lt;DIV class="" style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;&lt;/DIV&gt;&lt;P&gt;I attached the unmodified and modified version of the LWIP/FreeRTOS Ping example provided NXP. I followed your instructions to enable the SDRAM. The unmodified version works fine and pings our gateway server (192.168.0.1). The modified version, only modifying the settings per your instructions, the packets are dropped while the code is running.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since I am using LWIP in my final application, this example is a little more applicable for my situation. Please let me know if you have any advice.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mike Cooke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 04 Oct 2019 15:09:04 GMT</pubDate>
    <dc:creator>michaelc77</dc:creator>
    <dc:date>2019-10-04T15:09:04Z</dc:date>
    <item>
      <title>Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954299#M4403</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;My program has outgrown the internal RT1050 RAM and I need to use the external SDRAM on the EVK. I tried using the example FreeRTOS Hello World project as a known good. I am having issues with my project and the Hello World project. I either get hard faults or the program crashes at the clock configuration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I followed the "Using the MIMXRT1050-EVK(B) with MCUXpresso IDE v10.2.1" to try and configure my project to use the SDRAM. I noticed that the SDRAM example that is used in the document is for linking only to the SDRAM. I need to store the project and flash and use the SDRAM as my main memory. I tried the stock linker script and also tried changing the addresses to 0x8xxxxxx&amp;nbsp;instead of 0x4xxxxxx, since that is the location of the RAM in the MCU Settings menu.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is probably some setting I am missing. Please let me know if something jumps out.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Sep 2019 14:54:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954299#M4403</guid>
      <dc:creator>michaelc77</dc:creator>
      <dc:date>2019-09-20T14:54:07Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954300#M4404</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;The evkbimxrt1050_sdram_init file is used to initialize the SDRAM when debugging the demo project in the Keil, I find the evkbimxrt1050_freertos_hello is based on MCUXpresso, definitely, the evkbimxrt1050_sdram_init file is not fit it, so please follow the below steps to use the SDRAM as major RAM.&lt;BR /&gt;1. Add the XIP_BOOT_HEADER_DCD_ENABLE=1&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/88723iA1640155BEEEABA5/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;BR /&gt;2. Modify the memory assignment&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/88814iB44CDEB9CDED8C49/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;BR /&gt;2. Modify the extra linker script input sections&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/88972iD8E220CD9F98989E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Sep 2019 06:38:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954300#M4404</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-09-24T06:38:02Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954301#M4405</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am posting this for Micheal, since he is Moderated and that really slows things down...&lt;/P&gt;&lt;P&gt;(Who can fix that?)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Michael said:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the help! The project does work fine with your instructions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I moved these suggestions to my project that has LWIP and Ethernet enabled. The project is based off the "lwip_tcpecho_freertos" example to enable the PHY. With your above suggestions, the terminal outputs that it cannot initialize the PHY.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My first guess is that the SKIP_SYSCLK_INIT also skipped setting the clock to the PHY.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I disable the "SKIP_SYSCLK_INIT" in the processor, the program hard faults on return from&amp;nbsp;&lt;SPAN style="color: #263238; font-size: 13px;"&gt;BOARD_BootClockRUN&lt;/SPAN&gt;(); The "evkbimxrt1050_freertos_hello" project exhibits this same behavior.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What can you suggest for getting the PHY enabled correctly too?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Tom/Michael&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Sep 2019 13:20:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954301#M4405</guid>
      <dc:creator>w2vy</dc:creator>
      <dc:date>2019-09-25T13:20:35Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954302#M4406</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/jeremyzhou"&gt;jeremyzhou&lt;/A&gt;&lt;/P&gt;&lt;DIV class="" style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;&lt;/DIV&gt;&lt;P&gt;I attached the unmodified and modified version of the LWIP/FreeRTOS Ping example provided NXP. I followed your instructions to enable the SDRAM. The unmodified version works fine and pings our gateway server (192.168.0.1). The modified version, only modifying the settings per your instructions, the packets are dropped while the code is running.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since I am using LWIP in my final application, this example is a little more applicable for my situation. Please let me know if you have any advice.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mike Cooke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Oct 2019 15:09:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954302#M4406</guid>
      <dc:creator>michaelc77</dc:creator>
      <dc:date>2019-10-04T15:09:04Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954303#M4407</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mike,&lt;/P&gt;&lt;P&gt;Thanks for your reply,&lt;BR /&gt;I'd like to replicate the phenomenon you mentioned and reply to you later.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Oct 2019 08:00:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954303#M4407</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-10-08T08:00:50Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954304#M4408</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mike,&lt;/P&gt;&lt;P&gt;Yes, I've replicated the phenomenon you mentioned.&lt;BR /&gt;And after digging deeper, I suspect the phenomenon is related to memory management of LwIP, it seems that the memory management mechanism of&amp;nbsp; LwIP is incompatible with the SDRAM, I'll contact with the AE team for confirming this suspicion and reply to you late.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Oct 2019 11:01:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954304#M4408</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-10-09T11:01:37Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954305#M4409</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mike,&lt;/P&gt;&lt;P&gt;After digging deeper, I find that evkbimxrt1050_lwip_ping_freertos_SDRAM can work property after disabling the Cache feature via the comment out the below code in the BOARD_ConfigMPU(void);, please give a try.&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MPU-&amp;gt;RBAR = ARM_MPU_RBAR(8, 0x81E00000U);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MPU-&amp;gt;RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable MPU */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable I cache and D cache */&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //SCB_EnableDCache();&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //SCB_EnableICache();&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Oct 2019 07:15:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954305#M4409</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-10-15T07:15:50Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954306#M4410</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jeremy,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;That fixed it! Thank you for looking into that!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found a forum post (&lt;A href="https://community.nxp.com/thread/511704"&gt;RT1020-EVK: FreeRTOS + USB + SDRAM = HardFault&lt;/A&gt;&amp;nbsp;) that uses the lwip_httpscli_mbedTLS_freertos and SDRAM. I checked&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;BOARD_ConfigMPU(void) and the cache is enabled. Is there a way to run this with the cache enabled?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Mike&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Oct 2019 13:41:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/954306#M4410</guid>
      <dc:creator>michaelc77</dc:creator>
      <dc:date>2019-10-15T13:41:28Z</dc:date>
    </item>
    <item>
      <title>Re: Getting board SDRAM working with RT1050EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/1649389#M25024</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/56840"&gt;@jeremyzhou&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/114809"&gt;@michaelc77&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/19559"&gt;@w2vy&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm facing the same problem, using the LwIP stack. It was&lt;SPAN&gt;&amp;nbsp;previously functioning flawlessly, allowing seamless pinging from other devices. However, after executing a code segment stored in the SDRAM, the Ethernet connectivity abruptly ceased to work.&lt;/SPAN&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you please tell me that have you resolved the issue or not?&lt;/P&gt;&lt;P&gt;Please share your update on this also.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;'it seems that the memory management mechanism of LwIP is incompatible with the SDRAM"&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 12 May 2023 11:55:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Getting-board-SDRAM-working-with-RT1050EVKB/m-p/1649389#M25024</guid>
      <dc:creator>maulesh</dc:creator>
      <dc:date>2023-05-12T11:55:56Z</dc:date>
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