topic Re: i.MXRT1021 ETM trace port size? in i.MX RT Crossover MCUs

i.MXRT1021 ETM trace port size?

chris_eyre — Thu, 18 Jul 2019 17:01:57 GMT

What is the supported ETM trace port size on the RT1021? The 1020 reference manual suggests that TRACEDATA can be 1, 2, or 4 bits and 4-bit mode is recommended (see 7.2.2.2 CoreSight trace port interface). However, this seems to conflict with the actual behavior of the device. With a debug connection to the 1021 evaluation kit. I observed that the ARM TPIU Supported Port Size register is fixed to 1 (0xE0040000=0x00000001). If my understanding is correct, this register indicates that only PORT_SIZE=1 is supported by the device and this cannot be changed. My evaluation kit has been modified to support ETM trace and I was able to verify that 1-bit ETM trace is working, but not 2-bit or 4-bit mode.

We are evaluating the 1021 as a possible migration from the K24. With the k24 we are using 4-bit TRACEDATA mode and this seems to meet our needs. On the k24 I confirmed that the Supported Port size register indicates 4-bit mode is supported. ETM trace is important for our applications so I am concerned with the apparent limit of 1-bit ETM Trace and at this point it is unclear whether this will cause some kind of trace data bottleneck.

Re: i.MXRT1021 ETM trace port size?

jeremyzhou — Fri, 19 Jul 2019 03:23:04 GMT

Hi Chris Eyre,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
I've also checked the value of TPIU_SSPSR (Supported Parallel Port Size Register) for confirmation, it seems that the RT1020 only support the 1-bit trace port, however, I still need to confirm it with the AE team and inform you if I get some replies from them.

Have a great day,
TIC

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Re: i.MXRT1021 ETM trace port size?

Aubineau_FAE — Fri, 04 Oct 2019 08:39:19 GMT

Hi,

Strange, in the SDK you clearly see you have 4 TRACE pin:

Search "trace" (6 hits in 1 file)
 C:\Users\nxa22167\AppData\Local\Temp\1\Temp1_SDK_2.6.1_EVK-MIMXRT1020.zip\devices\MIMXRT1021\drivers\fsl_iomuxc.h (6 hits)
 Line 466: #define IOMUXC_GPIO_AD_B0_10_ARM_CM7_TRACE_CLK 0x401F80E4U, 0x6U, 0, 0, 0x401F8258U
 Line 474: #define IOMUXC_GPIO_AD_B0_11_ARM_CM7_TRACE_SWO 0x401F80E8U, 0x6U, 0, 0, 0x401F825CU
 Line 482: #define IOMUXC_GPIO_AD_B0_12_ARM_CM7_TRACE00 0x401F80ECU, 0x6U, 0, 0, 0x401F8260U
 Line 491: #define IOMUXC_GPIO_AD_B0_13_ARM_CM7_TRACE01 0x401F80F0U, 0x6U, 0, 0, 0x401F8264U
 Line 500: #define IOMUXC_GPIO_AD_B0_14_ARM_CM7_TRACE02 0x401F80F4U, 0x6U, 0, 0, 0x401F8268U
 Line 509: #define IOMUXC_GPIO_AD_B0_15_ARM_CM7_TRACE03 0x401F80F8U, 0x6U, 0, 0, 0x401F826CU‍‍‍‍‍‍‍‍

In the i.MXRT1050 it is the same and the app note 12437 descritbe it page :

https://www.nxp.com/docs/en/application-note/AN12437.pdf

Re: i.MXRT1021 ETM trace port size?

jeremyzhou — Tue, 08 Oct 2019 03:17:39 GMT

Hi vincent.aubineau,

Thanks for your reply,
I think the post can answer your inquiry.

RT1052/RT1061 trace port width

Have a great day,
TIC

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