topic Re: i.MX RT1170 SDRAM Configuration from SDK Example: Auto-Refresh Disabled? in i.MX RT Crossover MCUs

i.MX RT1170 SDRAM Configuration from SDK Example: Auto-Refresh Disabled?

Masmiseim — Thu, 06 Aug 2026 09:33:53 GMT

Hello NXP Team,

we created the SDRAM configuration for our custom i.MX RT1170 based hardware using the MCUXpresso SDK example as a reference: https://github.com/nxp-mcuxpresso/mcuxsdk-examples/blob/main/_boards/evkbmimxrt1170/demo_apps/shell/shell.mex

Our design uses an ISSI IS42S16320F SDRAM connected to the SEMC interface.

Unfortunately, we are experiencing occasional system instabilities with this configuration. While reviewing the SDRAM settings in detail, we noticed that Auto-Refresh appears to be disabled in the example configuration:

This surprised us, because according to our understanding the IS42S16320F requires periodic refresh cycles to maintain data integrity, and therefore we would expect Auto-Refresh to be enabled.

Could you please clarify the following points?

Is it correct that Auto-Refresh is intentionally disabled in the provided SDK example?
If so, what is the rationale behind this configuration?
Are SDRAM refresh cycles handled elsewhere by the SEMC controller or software initialization code?
For an ISSI IS42S16320F on a custom hardware design, would you recommend enabling Auto-Refresh explicitly?

Thank you for your support.

Best regards,

Re: i.MX RT1170 SDRAM Configuration from SDK Example: Auto-Refresh Disabled?

Littell — Thu, 06 Aug 2026 12:59:25 GMT

It's always wise to treat anything you attempt to use from the SDK as just an example and therefore you should check & verify everything.

Re: i.MX RT1170 SDRAM Configuration from SDK Example: Auto-Refresh Disabled?

Habib_MS — Thu, 06 Aug 2026 22:45:59 GMT

Hello @Masmiseim,
The DCD configuration provided in the example is implemented for the SDRAM used on the RT1170-EVKB. As you may know, each SDRAM device has its own timing requirements and initialization parameters, so the SEMC configuration included in the example may not be fully compatible with your specific SDRAM.

In this example, the Auto Refresh feature is enabled as part of the final SDRAM initialization sequence. However, during the initialization process itself, the Auto Refresh bit remains disabled and the required refresh operations are performed through SEMC IP commands, as shown in the images below:

If you would like to customize these settings for your SDRAM, the DCD can be generated using the MCUXpresso Config Tools. This allows you to configure the SDRAM parameters according to your device requirements, as illustrated in the following image:

On the other hand, there is available an SDK (version 26.06) example called "semc_cm7" which demonstrates how use the SEMC peripheral with an external SDRAM.

Finally, in this community post Omar provides an example for configure the SEMC registers that could be useful.

BR
Habib