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    <title>topic [iMXRT1064 ADC-ETC] ADC-ETC latched DMA mode in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1064-ADC-ETC-ADC-ETC-latched-DMA-mode/m-p/2358837#M36545</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm using iMXRT1064.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;According to reference manual there are DMA request types:&amp;nbsp;&lt;STRONG&gt;pulsed&lt;/STRONG&gt; and &lt;STRONG&gt;latched&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;Latched: "Trig DMA_REQ with latched signal, REQ will be cleared when ACK and &lt;STRONG&gt;source request&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;cleared&lt;/STRONG&gt;."&lt;/P&gt;&lt;P&gt;Pulsed: "Trig DMA_REQ with pulsed signal, REQ will be cleared by ACK only."&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm trying to understand in latched mode what "&lt;U&gt;source request cleared&lt;/U&gt;" refers to.&lt;/P&gt;&lt;P&gt;What is exactly this "source request"?&lt;/P&gt;&lt;P&gt;How user can clear it?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At first I thought this refers to DMA_CTRL TRIGx_REQ bits, however clearing those does not lead to stable behavior - DMA keeps handling requests when it shouldn't.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd appreciate any hint.&lt;/P&gt;</description>
    <pubDate>Wed, 29 Apr 2026 21:47:22 GMT</pubDate>
    <dc:creator>matanl</dc:creator>
    <dc:date>2026-04-29T21:47:22Z</dc:date>
    <item>
      <title>[iMXRT1064 ADC-ETC] ADC-ETC latched DMA mode</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1064-ADC-ETC-ADC-ETC-latched-DMA-mode/m-p/2358837#M36545</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm using iMXRT1064.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;According to reference manual there are DMA request types:&amp;nbsp;&lt;STRONG&gt;pulsed&lt;/STRONG&gt; and &lt;STRONG&gt;latched&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;Latched: "Trig DMA_REQ with latched signal, REQ will be cleared when ACK and &lt;STRONG&gt;source request&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;cleared&lt;/STRONG&gt;."&lt;/P&gt;&lt;P&gt;Pulsed: "Trig DMA_REQ with pulsed signal, REQ will be cleared by ACK only."&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm trying to understand in latched mode what "&lt;U&gt;source request cleared&lt;/U&gt;" refers to.&lt;/P&gt;&lt;P&gt;What is exactly this "source request"?&lt;/P&gt;&lt;P&gt;How user can clear it?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At first I thought this refers to DMA_CTRL TRIGx_REQ bits, however clearing those does not lead to stable behavior - DMA keeps handling requests when it shouldn't.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd appreciate any hint.&lt;/P&gt;</description>
      <pubDate>Wed, 29 Apr 2026 21:47:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/iMXRT1064-ADC-ETC-ADC-ETC-latched-DMA-mode/m-p/2358837#M36545</guid>
      <dc:creator>matanl</dc:creator>
      <dc:date>2026-04-29T21:47:22Z</dc:date>
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