SEMC SDRAM autorefresh triggered manually behaviour

Pencioner — Wed, 29 Apr 2026 11:32:55 GMT

I have an interesting question. Let's say i want to have more deterministic SDRAM read time in bare metal application (on RT1062), where the data is accessed quite randomly and with short reads (1-4 bytes), so i want to reduce the jitter of conflicting read with auto-refresh at same time. In the application i know sometimes that i will have enough time before next read. So i want to trigger auto refresh manually by IP command registers:

SEMC_IPCR0 = 0x80000000;

SEMC_IPCMD = 0xA55A000C;

and then hope that this will move the next refresh deadline so that i will have less refresh-related delays in general.

Question: does SEMC reset the refresh watchdogs/counters when this command is executed, or triggering manually is just useless and will have no positive effect?

Re: SEMC SDRAM autorefresh triggered manually behaviour

Gavin_Jia — Thu, 07 May 2026 06:52:30 GMT

Hi @Pencioner ,

Thanks for your interest in NXP MIMXRT series!

Manual SEMC IP AutoRefresh command does issue an AutoRefresh command to the SDRAM device, but based on the public RT1060 documentation and SDK behavior, there is no documented guarantee that this command reloads or resets SEMC’s internal auto-refresh timer/deadline. Therefore it should not be used as a method to shift the next automatic refresh. Automatic refresh timing is still controlled by SDRAMCR3.

Best regards,
Gavin

i.MX RT Crossover MCUsのトピックSEMC SDRAM autorefresh triggered manually behaviour

SEMC SDRAM autorefresh triggered manually behaviour

Re: SEMC SDRAM autorefresh triggered manually behaviour