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    <title>topic Re: RT1052的SDRAM的IPTXDAT寄存器的配置问题 in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2352793#M36502</link>
    <description>&lt;P&gt;感谢！&lt;/P&gt;</description>
    <pubDate>Fri, 17 Apr 2026 08:45:45 GMT</pubDate>
    <dc:creator>FromCH0</dc:creator>
    <dc:date>2026-04-17T08:45:45Z</dc:date>
    <item>
      <title>RT1052的SDRAM的IPTXDAT寄存器的配置问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2349956#M36478</link>
      <description>&lt;P&gt;NXP技术支持：&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; 您好！&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; 以下是NXP官方RT1052的SDK中的.ini文件中的SDRAM初始化部分：&lt;/P&gt;&lt;P&gt;FUNC void _sdr_Init(void)&lt;BR /&gt;{&lt;BR /&gt;// Config IOMUX&lt;BR /&gt;_WDWORD(0x401F8014, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8018, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F801C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8020, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8024, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8028, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F802C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8030, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8034, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8038, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F803C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8040, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8044, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8048, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F804C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8050, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8054, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8058, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F805C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8060, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8064, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8068, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F806C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8070, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8074, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8078, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F807C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8080, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8084, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8088, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F808C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8090, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8094, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F8098, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F809C, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F80A0, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F80A4, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F80A8, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F80AC, 0x00000000);&lt;BR /&gt;_WDWORD(0x401F80B0, 0x00000010); // EMC_39, DQS PIN, enable SION&lt;BR /&gt;&lt;BR /&gt;// PAD ctrl&lt;BR /&gt;// drive strength = 0x7 to increase drive strength&lt;BR /&gt;// otherwise the data7 bit may fail.&lt;BR /&gt;_WDWORD(0x401F8204, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8208, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F820C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8210, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8214, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8218, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F821C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8220, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8224, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8228, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F822C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8230, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8234, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8238, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F823C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8240, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8244, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8248, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F824C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8250, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8254, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8258, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F825C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8260, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8264, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8268, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F826C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8270, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8274, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8278, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F827C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8280, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8284, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8288, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F828C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8290, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8294, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F8298, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F829C, 0x000110F9);&lt;BR /&gt;_WDWORD(0x401F82A0, 0x000110F9);&lt;/P&gt;&lt;P&gt;// Config SDR Controller Registers/&lt;BR /&gt;_WDWORD(0x402F0000,0x10000004); // MCR&lt;BR /&gt;_WDWORD(0x402F0008,0x00000081); // BMCR0&lt;BR /&gt;_WDWORD(0x402F000C,0x00000081); // BMCR1&lt;BR /&gt;_WDWORD(0x402F0010,0x8000001B); // BR0, 32MB&lt;BR /&gt;&lt;BR /&gt;_WDWORD(0x402F0040,0x00000F07); // SDRAMCR0&lt;BR /&gt;_WDWORD(0x402F0044,0x00652922); // SDRAMCR1&lt;BR /&gt;_WDWORD(0x402F0048,0x00010920); // SDRAMCR2&lt;BR /&gt;_WDWORD(0x402F004C,0x50210A08); // SDRAMCR3&lt;/P&gt;&lt;P&gt;_WDWORD(0x402F0090,0x80000000); // IPCR0&lt;BR /&gt;_WDWORD(0x402F0094,0x00000002); // IPCR1&lt;BR /&gt;_WDWORD(0x402F0098,0x00000000); // IPCR2&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;_WDWORD(0x402F009C,0xA55A000F); // IPCMD, SD_CC_IPREA&lt;BR /&gt;SDRAM_WaitIpCmdDone();&lt;BR /&gt;_WDWORD(0x402F009C,0xA55A000C); // SD_CC_IAF&lt;BR /&gt;SDRAM_WaitIpCmdDone();&lt;BR /&gt;_WDWORD(0x402F009C,0xA55A000C); // SD_CC_IAF&lt;BR /&gt;SDRAM_WaitIpCmdDone();&lt;BR /&gt;_WDWORD(0x402F00A0,0x00000030); // IPTXDAT&lt;BR /&gt;_WDWORD(0x402F009C,0xA55A000A); // SD_CC_IMS&lt;BR /&gt;SDRAM_WaitIpCmdDone();&lt;BR /&gt;_WDWORD(0x402F004C,0x08080A01 ); // enable sdram self refresh again after initialization done.&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;我查了官方的RM（参考手册），然后，还是不理解“_WDWORD(0x402F00A0,0x00000030); // IPTXDAT”这个语句中，为何要把0x402F00A0这一寄存器的数据配置成x00000030。事实上，RM中，这部分描述很少。网上有种说法，说这是为了配置成“0011 = CAS Latency = 3个时钟周期”，对吗？&lt;/P&gt;&lt;P&gt;谢谢！&lt;/P&gt;</description>
      <pubDate>Mon, 13 Apr 2026 07:37:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2349956#M36478</guid>
      <dc:creator>FromCH0</dc:creator>
      <dc:date>2026-04-13T07:37:19Z</dc:date>
    </item>
    <item>
      <title>Re: RT1052的SDRAM的IPTXDAT寄存器的配置问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2352772#M36501</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/191688"&gt;@FromCH0&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thank you so much for your interest in our products and for using our community.&lt;/P&gt;
&lt;P&gt;"_WDWORD(0x402F00A0,0x00000030); // IPTXDAT&lt;/P&gt;
&lt;P&gt;&amp;nbsp;_WDWORD(0x402F009C,0xA55A000A); // SD_CC_IMS" is used to write the mode register inside the SDRAM memory.&lt;/P&gt;
&lt;P&gt;To init one SDRAM, we need to configure the mode register&amp;nbsp;inside the SDRAM memory, below is an example of mode register in the SDRAM. It configured Latency mode, burst type, burst length and etc..&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="11.png" style="width: 903px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/382732i40F77C9220BE008F/image-size/large?v=v2&amp;amp;px=999" role="button" title="11.png" alt="11.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;So&amp;nbsp;0x00000030 corresponds to the configuration value of the mode register inside the SDRAM. It configured the CAS latency to 3 and burst length to 1.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Wish it helps you&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;May Liu&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 17 Apr 2026 08:13:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2352772#M36501</guid>
      <dc:creator>mayliu1</dc:creator>
      <dc:date>2026-04-17T08:13:11Z</dc:date>
    </item>
    <item>
      <title>Re: RT1052的SDRAM的IPTXDAT寄存器的配置问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2352793#M36502</link>
      <description>&lt;P&gt;感谢！&lt;/P&gt;</description>
      <pubDate>Fri, 17 Apr 2026 08:45:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1052%E7%9A%84SDRAM%E7%9A%84IPTXDAT%E5%AF%84%E5%AD%98%E5%99%A8%E7%9A%84%E9%85%8D%E7%BD%AE%E9%97%AE%E9%A2%98/m-p/2352793#M36502</guid>
      <dc:creator>FromCH0</dc:creator>
      <dc:date>2026-04-17T08:45:45Z</dc:date>
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