<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic sequencing of imxrt1170 LDO in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/sequencing-of-imxrt1170-LDO/m-p/2333418#M36364</link>
    <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I'm working on a low-power design with the iMX&lt;/SPAN&gt;&lt;SPAN&gt;RT1170 and have a question regarding its internal power management module.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I understand that the General Power Controller&amp;nbsp; handles power sequencing during low-power mode transitions . However, I'd like to confirm the boundary between hardware and software responsibility:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Does the internal&amp;nbsp; module completely automate the power-up and power-down sequences for the internal domains (like turning CPU and peripheral power on/off) when moving between run modes and deep sleep modes?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Or does the application software need to manually control any part of this sequencing (beyond just configuring the target mode and executing wFI)?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;&lt;SPAN&gt;I want to ensure I understand correctly what the hardware handles automatically versus what I need to manage in firmware.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;#imxrt1170&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Thank you for your help!&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 16 Mar 2026 09:24:05 GMT</pubDate>
    <dc:creator>Aakas_244</dc:creator>
    <dc:date>2026-03-16T09:24:05Z</dc:date>
    <item>
      <title>sequencing of imxrt1170 LDO</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/sequencing-of-imxrt1170-LDO/m-p/2333418#M36364</link>
      <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I'm working on a low-power design with the iMX&lt;/SPAN&gt;&lt;SPAN&gt;RT1170 and have a question regarding its internal power management module.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;I understand that the General Power Controller&amp;nbsp; handles power sequencing during low-power mode transitions . However, I'd like to confirm the boundary between hardware and software responsibility:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Does the internal&amp;nbsp; module completely automate the power-up and power-down sequences for the internal domains (like turning CPU and peripheral power on/off) when moving between run modes and deep sleep modes?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;Or does the application software need to manually control any part of this sequencing (beyond just configuring the target mode and executing wFI)?&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P class=""&gt;&lt;SPAN&gt;I want to ensure I understand correctly what the hardware handles automatically versus what I need to manage in firmware.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;#imxrt1170&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Thank you for your help!&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 16 Mar 2026 09:24:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/sequencing-of-imxrt1170-LDO/m-p/2333418#M36364</guid>
      <dc:creator>Aakas_244</dc:creator>
      <dc:date>2026-03-16T09:24:05Z</dc:date>
    </item>
    <item>
      <title>Re: sequencing of imxrt1170 LDO</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/sequencing-of-imxrt1170-LDO/m-p/2333829#M36369</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/255300"&gt;@Aakas_244&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;/P&gt;
&lt;DIV&gt;
&lt;P&gt;&lt;SPAN&gt;When configured correctly, the i.MX RT1170 hardware&amp;nbsp; fully handles the internal power‑up and power‑down sequencing. The General Power Controller (GPC) automatically executes mode transitions, setpoint changes, and power gating through the PGMC once the CPU issues WFI/WFE.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; However, software still has some&amp;nbsp; preparation tasks: &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1: Preconfigure the target power mode and setpoint. &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2: Ensure all bus masters peripherals are idle , before entering low‑power mode.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;3: Configure SSARC descriptors,&amp;nbsp; so registers in power‑gated domains can be automatically saved and restored. &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;In conclusion,&amp;nbsp; hardware performs the sequencing, but software must prepare the system and configure retention before triggering WFI.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;I suggest you can refer to the below application notes:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13148.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13148.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13120.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13120.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13104.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13104.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Wish it helps you&lt;/P&gt;
&lt;P&gt;Best Regards&lt;/P&gt;
&lt;P&gt;mayLiu&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Tue, 17 Mar 2026 06:19:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/sequencing-of-imxrt1170-LDO/m-p/2333829#M36369</guid>
      <dc:creator>mayliu1</dc:creator>
      <dc:date>2026-03-17T06:19:16Z</dc:date>
    </item>
  </channel>
</rss>

