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    <title>topic Re: Question about NAND bad block scanning and DBBT generation during provisioning in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329668#M36347</link>
    <description>Hi Martin,&lt;BR /&gt;very interesting, but I'd like to know how provisioning tool writes FCB and DBBT table, and if scanning NAND before to write bootable image.&lt;BR /&gt;&lt;BR /&gt;BRC what does mean ?</description>
    <pubDate>Tue, 10 Mar 2026 10:15:29 GMT</pubDate>
    <dc:creator>Nexus76</dc:creator>
    <dc:date>2026-03-10T10:15:29Z</dc:date>
    <item>
      <title>Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329079#M36338</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working with an &lt;STRONG&gt;i.MX RT1171 booting from SEMC NAND&lt;/STRONG&gt; and I am using the &lt;STRONG&gt;Secure Provisioning Tool / Manufacturing Tool&lt;/STRONG&gt; to program the boot image.&lt;/P&gt;&lt;P&gt;During the provisioning process the tool loads the &lt;STRONG&gt;flashloader&lt;/STRONG&gt; and programs the image into the NAND. However, I would like to better understand how the &lt;STRONG&gt;DBBT (Discovered Bad Block Table)&lt;/STRONG&gt; is generated.&lt;/P&gt;&lt;P&gt;My question is:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;During programming with the Provisioning Tool (or Manufacturing Tool), is the NAND scanned for bad blocks and is the DBBT automatically generated/updated before writing the boot image?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;In other words, does the flashloader perform something like:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;NAND initialization&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;scan of NAND blocks to detect bad blocks&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;creation/update of the DBBT structure&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;writing of FCB and DBBT&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;writing of the boot image&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Or is the DBBT expected to already exist in the NAND or inside the boot image?&lt;/P&gt;&lt;P&gt;I am trying to understand if the provisioning process automatically rebuilds the DBBT or if it must be generated separately.&lt;/P&gt;&lt;P&gt;Thank you very much for your help.&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;Ernesto Schianchi&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2026 15:28:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329079#M36338</guid>
      <dc:creator>Nexus76</dc:creator>
      <dc:date>2026-03-09T15:28:47Z</dc:date>
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    <item>
      <title>Re: Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329653#M36345</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205654"&gt;@Nexus76&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you’re interested in the details of DBBT table management, take a deep dive into the i.MX RT flashloader sources and search for the DBBT pattern. The way the flashloader processes the DBBT is similar to how BRC is handled. You can find the flashloader sources under evkbimxrt1170_flashloader_cm7 in the SDK package. There is also a CM4 port available.&lt;BR /&gt;I believe you’ll find useful information in&lt;BR /&gt;/evkbimxrt1170_flashloader_cm7/source/src/memory/src/semc_nand_memory.c,&lt;BR /&gt;but it’s worth checking the other SEMC NAND–related files as well.&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Martin&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 09:51:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329653#M36345</guid>
      <dc:creator>martin_lapis</dc:creator>
      <dc:date>2026-03-10T09:51:32Z</dc:date>
    </item>
    <item>
      <title>Re: Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329668#M36347</link>
      <description>Hi Martin,&lt;BR /&gt;very interesting, but I'd like to know how provisioning tool writes FCB and DBBT table, and if scanning NAND before to write bootable image.&lt;BR /&gt;&lt;BR /&gt;BRC what does mean ?</description>
      <pubDate>Tue, 10 Mar 2026 10:15:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329668#M36347</guid>
      <dc:creator>Nexus76</dc:creator>
      <dc:date>2026-03-10T10:15:29Z</dc:date>
    </item>
    <item>
      <title>Re: Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329744#M36348</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205654"&gt;@Nexus76&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BRC means Boot Rom Code.&lt;/P&gt;
&lt;P&gt;SEC provisioning tool does not manage DBBT or FCB. SEC tool just execute flashloader to manage FCB or DBBT. That is why I point you to flashloader sources.&lt;/P&gt;
&lt;P&gt;Best Regards.&lt;BR /&gt;Martin&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 11:24:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329744#M36348</guid>
      <dc:creator>martin_lapis</dc:creator>
      <dc:date>2026-03-10T11:24:00Z</dc:date>
    </item>
    <item>
      <title>Re: Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329864#M36349</link>
      <description>Hi Martin,&lt;BR /&gt;thank for reply, so the SEC only add to bootable image, before writing, the FCB and DBBT tables ?&lt;BR /&gt;The BCR does update these tables when write image ?&lt;BR /&gt;</description>
      <pubDate>Tue, 10 Mar 2026 12:46:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2329864#M36349</guid>
      <dc:creator>Nexus76</dc:creator>
      <dc:date>2026-03-10T12:46:00Z</dc:date>
    </item>
    <item>
      <title>Re: Question about NAND bad block scanning and DBBT generation during provisioning</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2330415#M36351</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205654"&gt;@Nexus76&lt;/a&gt;,&lt;BR /&gt;Please take a look at the LOG window in the SEC tool. It will help you understand all actions performed by the SEC.&lt;BR /&gt;In short: the SEC tool uploads the flashloader into the internal OCRAM memory and executes it. From that point on, all communication is between the SEC tool and the flashloader. In the LOG window, you can observe the actions of the SEC tool (the commands sent to the flashloader).&lt;BR /&gt;Pay particular attention to the configure-memory command, where the flash is configured. At this stage, all necessary support operations (such as DBBT checking, etc.) are expected to be performed.&lt;BR /&gt;So, check the flashloader sources, find the implementation of the configure-memory command, and you will see what actions the flashloader performs to configure the flash memory.&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Martin&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2026 09:25:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Question-about-NAND-bad-block-scanning-and-DBBT-generation/m-p/2330415#M36351</guid>
      <dc:creator>martin_lapis</dc:creator>
      <dc:date>2026-03-11T09:25:50Z</dc:date>
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