MIMXRT1180-EVK semc_cm33 SDK example Write & Read Compare Failed

SteffenLindner — Thu, 26 Feb 2026 13:36:07 GMT

Hi,

we are currently testing the MIMXRT1180-EVK.

For some reason, the evkmimxrt1180_semc_cm33 SDK example fails, i.e., it prints:

From other posts, I have seen that the init code might use wrong timing information:

status_t BOARD_InitSEMC(void) { semc_config_t config; semc_sdram_config_t sdramconfig; uint32_t clockFrq = EXAMPLE_SEMC_CLK_FREQ; /* Initializes the MAC configure structure to zero. */ memset(&config, 0, sizeof(semc_config_t)); memset(&sdramconfig, 0, sizeof(semc_sdram_config_t)); /* Initialize SEMC. */ SEMC_GetDefaultConfig(&config); config.dqsMode = kSEMC_Loopbackdqspad; /* For more accurate timing. */ SEMC_Init(SEMC, &config); /* Configure SDRAM. */ sdramconfig.csxPinMux = kSEMC_MUXCSX0; sdramconfig.address = 0x80000000; sdramconfig.memsize_kbytes = 32 * 1024; /* 64MB = 2*32*1024*1KBytes*/ sdramconfig.portSize = kSEMC_PortSize16Bit; /*two 16-bit SDRAMs make up 32-bit portsize*/ sdramconfig.burstLen = kSEMC_Sdram_BurstLen8; sdramconfig.columnAddrBitNum = kSEMC_SdramColunm_9bit; sdramconfig.casLatency = kSEMC_LatencyThree; sdramconfig.tPrecharge2Act_Ns = 15; /* tRP 15ns */ sdramconfig.tAct2ReadWrite_Ns = 15; /* tRCD 15ns */ sdramconfig.tRefreshRecovery_Ns = 70; /* Use the maximum of the (Trfc , Txsr). */ sdramconfig.tWriteRecovery_Ns = 2; /* tWR 2ns */ sdramconfig.tCkeOff_Ns = 42; /* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/ sdramconfig.tAct2Prechage_Ns = 40; /* tRAS 40ns */ sdramconfig.tSelfRefRecovery_Ns = 70; sdramconfig.tRefresh2Refresh_Ns = 60; sdramconfig.tAct2Act_Ns = 2; sdramconfig.tPrescalePeriod_Ns = 160 * (1000000000 / clockFrq); sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; /* 64ms/8192 */ sdramconfig.refreshUrgThreshold = sdramconfig.refreshPeriod_nsPerRow; sdramconfig.refreshBurstLen = 1; sdramconfig.delayChain = 2; return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq); }

On the board is a W9825G6KH-J5. From the data sheet, i do not really see an issue with the parameters.

Any suggestions what could be the reason that the out-of-the-box SDK example fails?

Background is we want to use the SDRAM for FreeRTOS heap, debugging boiling it down that the SDRAM is not correctly initialized / writable, which is confirmed by the SDK example.

(Reposted in the correct forum; delete the other post)

Re: MIMXRT1180-EVK semc_cm33 SDK example Write & Read Compare Failed

Kan_Li — Wed, 04 Mar 2026 08:52:12 GMT

Hi @SteffenLindner .

Thanks for the reaching out! I am wondering if you have already set up the board properly as shown below, please kindly clarify.

Board settings
============
1. Remove R203, R205-R227 resisters.
2. Populate R151-R165, R168-R188 with 0ohm resisters.
3. Remove resistors R2114, R2115, R2118, R2119, R2122, R2123, R2126, R2127, R2130, R2131, R332, R333, to 
 disconnect HyperRAM interface.
4. Populate these resistors with 0ohm resistor, such as R1329, R2594, R2595, R189-R196, R198, R200-R202, R204.
5. Remove these resistors, such as R2596, R2597, R228-R235, R238, R240, R242, R244, R246, R248, R250, R252.

Have a great day,
Kan

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topic MIMXRT1180-EVK semc_cm33 SDK example Write & Read Compare Failed in i.MX RT Crossover MCUs

MIMXRT1180-EVK semc_cm33 SDK example Write & Read Compare Failed

Re: MIMXRT1180-EVK semc_cm33 SDK example Write & Read Compare Failed