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    <title>i.MX RT Crossover MCUs中的主题 i.MX RT1060 API's LPSPI_MasterTransferEDMA does not support 24bit framesize?</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2291180#M35995</link>
    <description>&lt;P&gt;I’m trying to write 24bit frames via DMA with LPSPI. The application is not important but for my example it is to send data from memory to an external DAC. I want to get this working with DMA because I will eventually use a link-list of TCD’s together with PIT to update the DAC continuously w/o CPU overhead. This is a common application with external ADC and DAC. It is also common that 16bit DAC/ADC’s have 24bit frame requirements (top byte is for command, lower bytes for data). I don’t want to use uint8_t data and split the transfer into 3 bytes, I want to use uint32_t data and send with 24bits frame size, the top byte to be ignored.&lt;/P&gt;&lt;P&gt;Now, onto the LPSPI and DMA configuration.&lt;/P&gt;&lt;P&gt;1. The &lt;EM&gt;lpspi_master_config_t&lt;/EM&gt; structure of the imxRT1060 SDK’s API &lt;FONT color="#808080"&gt;LPSPI_MasterInit&lt;/FONT&gt; function allows me to set &lt;EM&gt;bitsPerFrame &lt;/EM&gt;to 24. This is no problem when doing a standard transfer w/o DMA.&lt;/P&gt;&lt;P&gt;2. However, when using DMA w/ the API's LPSPI_MasterTransferEDMA function, the case for 24-bits frame size is not handled or supported by the eDMA hardware? In LPSPI_MasterTransferEDMALite the DMA transfer width is set in the edma_transfer_config_t struct. Specifically, the&amp;nbsp;srcTransferSize&amp;nbsp;and&amp;nbsp;destTransferSize&amp;nbsp;fields are configured based on the&amp;nbsp;bytesEachRead&amp;nbsp;and&amp;nbsp;bytesLastWrite&amp;nbsp;values, which are derived from the SPI frame size (bytesPerFrame) by….&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/* LPSPI_MasterTransferPrepareEDMALite */

uint32_t bytesPerFrame = ((base-&amp;gt;TCR &amp;amp; LPSPI_TCR_FRAMESZ_MASK) &amp;gt;&amp;gt; LPSPI_TCR_FRAMESZ_SHIFT) / 8U + 1U;

if (bytesPerFrame &amp;lt;= 4U)
{
	handle-&amp;gt;bytesEachWrite = (uint8_t)bytesPerFrame; // for 24bit frames = 3
	handle-&amp;gt;bytesEachRead  = (uint8_t)bytesPerFrame; // ....
	handle-&amp;gt;bytesLastRead  = (uint8_t)bytesPerFrame; // ....
}&lt;/LI-CODE&gt;&lt;LI-CODE lang="c"&gt;/* now back in LPSPI_MasterTransferEDMALite */

switch (handle-&amp;gt;bytesEachRead) //bytes each transfer
{
	case (1U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
	transferConfigRx.minorLoopBytes  = 1;
	if (handle-&amp;gt;isByteSwap)
	{
		addrOffset = 3;
	}
	break;

	case (2U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
	transferConfigRx.minorLoopBytes  = 2;
	if (handle-&amp;gt;isByteSwap)
	{
		addrOffset = 2;
	}
	break;

	case (4U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
	transferConfigRx.minorLoopBytes  = 4;
	break;

	default:
	transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
	transferConfigRx.minorLoopBytes  = 1;
	assert(false);
	break;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We get the default case and an error as the case of 3 bytes is not handled. Does the&amp;nbsp;&lt;SPAN&gt;EDMA hardware support 3-byte transfers? Basically I want to use uint32_t data and frame as 3 bytes and transfer via DMA, ignoring the most significant byte. Is it possible?&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 09 Jan 2026 23:45:37 GMT</pubDate>
    <dc:creator>azone</dc:creator>
    <dc:date>2026-01-09T23:45:37Z</dc:date>
    <item>
      <title>i.MX RT1060 API's LPSPI_MasterTransferEDMA does not support 24bit framesize?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2291180#M35995</link>
      <description>&lt;P&gt;I’m trying to write 24bit frames via DMA with LPSPI. The application is not important but for my example it is to send data from memory to an external DAC. I want to get this working with DMA because I will eventually use a link-list of TCD’s together with PIT to update the DAC continuously w/o CPU overhead. This is a common application with external ADC and DAC. It is also common that 16bit DAC/ADC’s have 24bit frame requirements (top byte is for command, lower bytes for data). I don’t want to use uint8_t data and split the transfer into 3 bytes, I want to use uint32_t data and send with 24bits frame size, the top byte to be ignored.&lt;/P&gt;&lt;P&gt;Now, onto the LPSPI and DMA configuration.&lt;/P&gt;&lt;P&gt;1. The &lt;EM&gt;lpspi_master_config_t&lt;/EM&gt; structure of the imxRT1060 SDK’s API &lt;FONT color="#808080"&gt;LPSPI_MasterInit&lt;/FONT&gt; function allows me to set &lt;EM&gt;bitsPerFrame &lt;/EM&gt;to 24. This is no problem when doing a standard transfer w/o DMA.&lt;/P&gt;&lt;P&gt;2. However, when using DMA w/ the API's LPSPI_MasterTransferEDMA function, the case for 24-bits frame size is not handled or supported by the eDMA hardware? In LPSPI_MasterTransferEDMALite the DMA transfer width is set in the edma_transfer_config_t struct. Specifically, the&amp;nbsp;srcTransferSize&amp;nbsp;and&amp;nbsp;destTransferSize&amp;nbsp;fields are configured based on the&amp;nbsp;bytesEachRead&amp;nbsp;and&amp;nbsp;bytesLastWrite&amp;nbsp;values, which are derived from the SPI frame size (bytesPerFrame) by….&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/* LPSPI_MasterTransferPrepareEDMALite */

uint32_t bytesPerFrame = ((base-&amp;gt;TCR &amp;amp; LPSPI_TCR_FRAMESZ_MASK) &amp;gt;&amp;gt; LPSPI_TCR_FRAMESZ_SHIFT) / 8U + 1U;

if (bytesPerFrame &amp;lt;= 4U)
{
	handle-&amp;gt;bytesEachWrite = (uint8_t)bytesPerFrame; // for 24bit frames = 3
	handle-&amp;gt;bytesEachRead  = (uint8_t)bytesPerFrame; // ....
	handle-&amp;gt;bytesLastRead  = (uint8_t)bytesPerFrame; // ....
}&lt;/LI-CODE&gt;&lt;LI-CODE lang="c"&gt;/* now back in LPSPI_MasterTransferEDMALite */

switch (handle-&amp;gt;bytesEachRead) //bytes each transfer
{
	case (1U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
	transferConfigRx.minorLoopBytes  = 1;
	if (handle-&amp;gt;isByteSwap)
	{
		addrOffset = 3;
	}
	break;

	case (2U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
	transferConfigRx.minorLoopBytes  = 2;
	if (handle-&amp;gt;isByteSwap)
	{
		addrOffset = 2;
	}
	break;

	case (4U):
	transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
	transferConfigRx.minorLoopBytes  = 4;
	break;

	default:
	transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
	transferConfigRx.minorLoopBytes  = 1;
	assert(false);
	break;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We get the default case and an error as the case of 3 bytes is not handled. Does the&amp;nbsp;&lt;SPAN&gt;EDMA hardware support 3-byte transfers? Basically I want to use uint32_t data and frame as 3 bytes and transfer via DMA, ignoring the most significant byte. Is it possible?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 09 Jan 2026 23:45:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2291180#M35995</guid>
      <dc:creator>azone</dc:creator>
      <dc:date>2026-01-09T23:45:37Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX RT1060 API's LPSPI_MasterTransferEDMA does not support 24bit framesize?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2292109#M36006</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231967"&gt;@azone&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thank you so much for your interest in our products and for using our community.&lt;/P&gt;
&lt;P&gt;Please check the following link, it describe that eDMA support transfer sizes of&amp;nbsp; 1, 2, 4, 8, 16, 32, 64 bytes, it does not support 24bit(3 bytes) transfer size.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://mcuxpresso.nxp.com/api_doc/dev/2207/a00015.html" target="_blank"&gt;MCUXpresso SDK API Reference Manual: EDMA: Enhanced Direct Memory Access (eDMA) Controller Driver&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mayliu1_0-1768271744223.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/372558i46B4A47729056CDE/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mayliu1_0-1768271744223.png" alt="mayliu1_0-1768271744223.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best Regards&lt;/P&gt;
&lt;P&gt;MayLiu&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jan 2026 02:40:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2292109#M36006</guid>
      <dc:creator>mayliu1</dc:creator>
      <dc:date>2026-01-13T02:40:25Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX RT1060 API's LPSPI_MasterTransferEDMA does not support 24bit framesize?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2292305#M36009</link>
      <description>&lt;P&gt;ok thank you for confirmation, so I don't waste time trying to get it to work! So the only way really is to use make everything uint8_t data and send as three bytes w/&amp;nbsp;&lt;SPAN&gt;kLPSPI_MasterPcsContinuous. This is ok, as this is how we do it for all other peripherals, but it adds unnecessary overhead in the case of the 16-bit DAC implementation. Thank you.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jan 2026 08:03:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-MX-RT1060-API-s-LPSPI-MasterTransferEDMA-does-not-support/m-p/2292305#M36009</guid>
      <dc:creator>azone</dc:creator>
      <dc:date>2026-01-13T08:03:04Z</dc:date>
    </item>
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