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    <title>topic Re: Using larger NAND flash than on MIMXRT1170-EVKB in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2251736#M35759</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227618"&gt;@VojtechBaranek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I am sorry, but only one CE# on RT1170 for nand flash, as well as the&amp;nbsp;R/B# signal, so it is not possible to use&amp;nbsp;MT29F64G08AECABH1 with 64Gb split into 2 dies with 32Gb each due to this hardware limitation.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope that makes sense,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 01 Dec 2025 06:05:11 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2025-12-01T06:05:11Z</dc:date>
    <item>
      <title>Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2251561#M35754</link>
      <description>&lt;P&gt;Hi. I am working on a feasibility study for using&amp;nbsp;RT1170 with NAND flash as a telemetry storage. On the evaluation board&amp;nbsp;MIMXRT1170-EVKB there is&amp;nbsp;MT29F2G08ABAGAH4 NAND flash with&amp;nbsp;2Gb of storage. There is an example in the SDK called&amp;nbsp;evkbmimxrt1170_flash_component_nand_semc_cm7 which demonstrates working with the memory. This example is great and works perfectly.&lt;/P&gt;&lt;P&gt;Now our goal is use this MCU (specifically&amp;nbsp;MIMXRT1176CVM8A) on a custom board with large NAND flash&amp;nbsp;MT29F64G08AECABH1 with 64Gb split into 2 dies with 32Gb each, as this picture from the datasheet shows. For the time being in the asynchronous mode.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2025-11-30 21_28_11-Data Sheet_ 32_64_128_256Gb Async_Sync NAND (M73A) - nand_memory_datasheet.pdf —.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/367835i67F4B1E60D9CBCA7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="2025-11-30 21_28_11-Data Sheet_ 32_64_128_256Gb Async_Sync NAND (M73A) - nand_memory_datasheet.pdf —.png" alt="2025-11-30 21_28_11-Data Sheet_ 32_64_128_256Gb Async_Sync NAND (M73A) - nand_memory_datasheet.pdf —.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Can you please advise me on how to achieve that? How must the SDK example be modified to allow working with this memory?&lt;/P&gt;&lt;P&gt;Thank you in advance. Best regards Vojtech.&lt;/P&gt;</description>
      <pubDate>Sun, 30 Nov 2025 21:03:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2251561#M35754</guid>
      <dc:creator>VojtechBaranek</dc:creator>
      <dc:date>2025-11-30T21:03:25Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2251736#M35759</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227618"&gt;@VojtechBaranek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I am sorry, but only one CE# on RT1170 for nand flash, as well as the&amp;nbsp;R/B# signal, so it is not possible to use&amp;nbsp;MT29F64G08AECABH1 with 64Gb split into 2 dies with 32Gb each due to this hardware limitation.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope that makes sense,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 01 Dec 2025 06:05:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2251736#M35759</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-12-01T06:05:11Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2252146#M35760</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/59276"&gt;@Kan_Li&lt;/a&gt;, thank you for your quick response.&lt;/P&gt;&lt;P&gt;We are aware that this is not supported natively without effort, but we have an easy way around this. Instead of SEMC driving the CE# pins, we will drive them by GPIO pins, simply assert one CE# low, perform SEMC operations, and deassert pin. We will select only one die at a time.&lt;/P&gt;&lt;P&gt;For R/B# pins we will join them by AND gate chip (like&amp;nbsp;74AUP1G09GW). Since we want to use one die at a time, this will work smoothly. Each die can drive the pin as if it was connected directly.&lt;/P&gt;&lt;P&gt;Now what I need an advice on is how to correctly set up the example for SEMC controller to properly interact with this memory via IPCMD and AXI. Thank you.&lt;/P&gt;&lt;P&gt;Best regards Vojtech&lt;/P&gt;</description>
      <pubDate>Mon, 01 Dec 2025 09:35:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2252146#M35760</guid>
      <dc:creator>VojtechBaranek</dc:creator>
      <dc:date>2025-12-01T09:35:39Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2252806#M35762</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227618"&gt;@VojtechBaranek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for the clarification! I think your solution should be able to work theoretically, but I would recommend using some kind of chip to control the direction of the native CE# instead of using GPIOs to simulate the CE#, so that no need to change the configuration on SEMC, the IP itself always communicates with one nand device , while the application code knows and controls which nand device it is talking with.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Tue, 02 Dec 2025 06:22:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2252806#M35762</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-12-02T06:22:53Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2253089#M35768</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/59276"&gt;@Kan_Li&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;alright, I see your point. Let me put my request for support differently. Let's say I only want to use the die 1 with one LUN, and the second one totally unconnected and forgotten. The die 1 will be connected the same way as the NAND flash on DevKit, with CE# driven by SEMC via the same pin as in the example. So I am basically just replacing the 2 Gb NAND flash from DevKit with the 32 Gb half of the chip from the same family whose part number I mentioned previously.&lt;/P&gt;&lt;P&gt;Now, please, what are the steps I need to take in rewriting the example to work properly with this new NAND flash?&lt;/P&gt;&lt;P&gt;Thank you. Best regards Vojtech.&lt;/P&gt;</description>
      <pubDate>Tue, 02 Dec 2025 10:14:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2253089#M35768</guid>
      <dc:creator>VojtechBaranek</dc:creator>
      <dc:date>2025-12-02T10:14:57Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2253788#M35780</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227618"&gt;@VojtechBaranek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If so, I think you just need to update the memory size as below:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Kan_Li_1-1764745442686.png" style="width: 596px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/368387i91C15FCA41365E21/image-dimensions/596x133?v=v2" width="596" height="133" role="button" title="Kan_Li_1-1764745442686.png" alt="Kan_Li_1-1764745442686.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 03 Dec 2025 07:05:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2253788#M35780</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-12-03T07:05:04Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2254221#M35784</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/59276"&gt;@Kan_Li&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;that makes sense for the fields you mentioned. But shouldn't also columnAddrBitNum be extended?&lt;/P&gt;&lt;P&gt;Best regards, Vojtech.&lt;/P&gt;</description>
      <pubDate>Wed, 03 Dec 2025 12:16:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2254221#M35784</guid>
      <dc:creator>VojtechBaranek</dc:creator>
      <dc:date>2025-12-03T12:16:46Z</dc:date>
    </item>
    <item>
      <title>Re: Using larger NAND flash than on MIMXRT1170-EVKB</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2254830#M35791</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227618"&gt;@VojtechBaranek&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Yes, you are right! For the chip you selected, I think&amp;nbsp;&lt;SPAN&gt;kSEMC_NandColum_13bit should be used for the&amp;nbsp;columnAddrBitNum.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;BR /&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Thu, 04 Dec 2025 05:53:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Using-larger-NAND-flash-than-on-MIMXRT1170-EVKB/m-p/2254830#M35791</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2025-12-04T05:53:16Z</dc:date>
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