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    <title>topic Re: CAN RX continuously using eDMA in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/CAN-RX-continuously-using-eDMA/m-p/2186019#M35425</link>
    <description>&lt;P&gt;Using a timer to trigger DMA for CAN can cause bus errors due to unsynchronized peripheral requests. FlexCAN already supports DMA request generation on FIFO events—use that instead.&lt;BR /&gt;To prevent ISR abort, instead, use major loop completion interrupt to switch buffers.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Omar&lt;/P&gt;</description>
    <pubDate>Tue, 14 Oct 2025 19:53:43 GMT</pubDate>
    <dc:creator>Omar_Anguiano</dc:creator>
    <dc:date>2025-10-14T19:53:43Z</dc:date>
    <item>
      <title>CAN RX continuously using eDMA</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/CAN-RX-continuously-using-eDMA/m-p/2184828#M35415</link>
      <description>&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;I have a use case where I continuously get data via CAN every 20 milliseconds, and I have to send the data as is via UART. For CAN reception, I did not want the CPU to be checking and reinitializing DMA every 20 milliseconds post completion.&lt;/P&gt;&lt;P&gt;My idea was to set the source of the DMA MUX channel to the CAN FIFO, and use a ping pong buffer to continuously save data in memory. However, the CAN RX EDMA drivers callback aborts DMA transfer everytime the ISR is triggered. Second approach that I tired was to add a periodic timer and enable trigger mode for channel 0 (one I am using for CAN), and every 20 milliseconds when the timer elapses, a DMA request will be generated and if there is a peripheral request from CAN too, data will move from the CAN FIFO to the memory. I tired this approach as well and this ended up into me getting bus errors.&lt;/P&gt;&lt;P&gt;Is there a better way of doing this or an example code for the same? Thank you!&lt;/P&gt;</description>
      <pubDate>Mon, 13 Oct 2025 11:39:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/CAN-RX-continuously-using-eDMA/m-p/2184828#M35415</guid>
      <dc:creator>AmanKumbhani</dc:creator>
      <dc:date>2025-10-13T11:39:43Z</dc:date>
    </item>
    <item>
      <title>Re: CAN RX continuously using eDMA</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/CAN-RX-continuously-using-eDMA/m-p/2186019#M35425</link>
      <description>&lt;P&gt;Using a timer to trigger DMA for CAN can cause bus errors due to unsynchronized peripheral requests. FlexCAN already supports DMA request generation on FIFO events—use that instead.&lt;BR /&gt;To prevent ISR abort, instead, use major loop completion interrupt to switch buffers.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Omar&lt;/P&gt;</description>
      <pubDate>Tue, 14 Oct 2025 19:53:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/CAN-RX-continuously-using-eDMA/m-p/2186019#M35425</guid>
      <dc:creator>Omar_Anguiano</dc:creator>
      <dc:date>2025-10-14T19:53:43Z</dc:date>
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