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    <title>topic Re: [MIMXRT1040EVK] Help on Routing QTMR inputs through XBARA in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1040EVK-Help-on-Routing-QTMR-inputs-through-XBARA/m-p/2170476#M35205</link>
    <description>&lt;P&gt;&lt;BR /&gt;Hi !&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;My bad, I did not see those DNP (not mounted) 0ohms on the MIMXRT1040EVK board !&lt;BR /&gt;&lt;BR /&gt;This subject can be resolved now &lt;LI-EMOJI id="lia_slightly-smiling-face" title=":slightly_smiling_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Capture d’écran 2025-09-16 151556.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/357151i10D3308A462EDCAF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Capture d’écran 2025-09-16 151556.png" alt="Capture d’écran 2025-09-16 151556.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;My project works now as expected.&lt;BR /&gt;&lt;BR /&gt;Big thanks to NXP support for pointing out this detail !&lt;BR /&gt;&lt;BR /&gt;See you !  &lt;/P&gt;</description>
    <pubDate>Tue, 16 Sep 2025 13:19:06 GMT</pubDate>
    <dc:creator>vdpsr</dc:creator>
    <dc:date>2025-09-16T13:19:06Z</dc:date>
    <item>
      <title>[MIMXRT1040EVK] Help on Routing QTMR inputs through XBARA</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1040EVK-Help-on-Routing-QTMR-inputs-through-XBARA/m-p/2168674#M35182</link>
      <description>&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;I’m new to NXP devices (this is my first post), but I have good experience with MCUs. Right now I’m using the MIMXRT1040-EVK board.&lt;/P&gt;&lt;P&gt;My goal is to use the QTMR in quadrature mode to read two incremental rotary encoders at the same time. I’ve read the reference manual, tried many settings, and made some progress — but I’m stuck when using the XBAR INOUT pins.&lt;/P&gt;&lt;H3&gt;What works&lt;/H3&gt;&lt;P&gt;I can route the encoder signals to the QTMR timer inputs using either direct pins or XBAR IN signals (like XBAR1_IN22, XBAR1_IN23, etc.). The QTMR counts correctly, and UART shows both encoders working.&lt;/P&gt;&lt;P&gt;Here’s the setup in BOARD_InitPins() that works:&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Xbar1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_XBAR1_IN22, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_XBAR1_IN23, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_XBAR1_IN24, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_15_XBAR1_IN25, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_GPR-&amp;gt;GPR6 = ((IOMUXC_GPR-&amp;gt;GPR6 &amp;amp; (~(IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK))) | IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) ); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn25, kXBARA1_OutputQtimer1Tmr0Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn24, kXBARA1_OutputQtimer1Tmr1Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn23, kXBARA1_OutputQtimer1Tmr2Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn22, kXBARA1_OutputQtimer1Tmr3Input); &lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;H3&gt;What doesn’t work&lt;/H3&gt;&lt;P&gt;If I try to use XBAR INOUT pins instead, the QTMR doesn’t get valid signals. I see no counts. I think I’m missing a config step for the INOUT function, but I couldn’t find clear info in the docs.&lt;/P&gt;&lt;P&gt;Here’s my INOUT attempt:&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Xbar1); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07, &lt;SPAN class=""&gt;0U&lt;/SPAN&gt;); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04, &lt;SPAN class=""&gt;0x10B0&lt;/SPAN&gt;U); &lt;SPAN class=""&gt;// Not sure if needed&lt;/SPAN&gt; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05, &lt;SPAN class=""&gt;0x10B0&lt;/SPAN&gt;U); &lt;SPAN class=""&gt;// Not sure if needed&lt;/SPAN&gt; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06, &lt;SPAN class=""&gt;0x10B0&lt;/SPAN&gt;U); &lt;SPAN class=""&gt;// Not sure if needed&lt;/SPAN&gt; IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07, &lt;SPAN class=""&gt;0x10B0&lt;/SPAN&gt;U); &lt;SPAN class=""&gt;// Not sure if needed&lt;/SPAN&gt; IOMUXC_GPR-&amp;gt;GPR6 = ((IOMUXC_GPR-&amp;gt;GPR6 &amp;amp; (~(IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK))) | IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(&lt;SPAN class=""&gt;0x01&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(&lt;SPAN class=""&gt;0x00&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(&lt;SPAN class=""&gt;0x00&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(&lt;SPAN class=""&gt;0x00&lt;/SPAN&gt;U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(&lt;SPAN class=""&gt;0x00&lt;/SPAN&gt;U) ); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout05, kXBARA1_OutputQtimer4Tmr0Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputQtimer4Tmr1Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout07, kXBARA1_OutputQtimer4Tmr2Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout04, kXBARA1_OutputQtimer4Tmr3Input); &lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;PRE&gt;&amp;nbsp;&lt;/PRE&gt;&lt;H3&gt;My questions&lt;/H3&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;Has anyone used XBAR INOUT pins with QTMR in quadrature mode on the mimxrt 1040 evk (or similar i.MX RT boards)?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;Is there a setup step I’m missing ?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;Are there known limits when using XBAR INOUT for QTMR inputs?&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;H3&gt;Summary&lt;/H3&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Board:&lt;/STRONG&gt; MIMXRT1040-EVK&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Goal:&lt;/STRONG&gt; Read two encoders with one QTMR&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Works:&lt;/STRONG&gt; Routing through XBAR IN&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Doesn’t work:&lt;/STRONG&gt; Routing through XBAR INOUT&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Any tips, examples, or references would really help. Thanks!&lt;/P&gt;</description>
      <pubDate>Fri, 12 Sep 2025 06:51:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1040EVK-Help-on-Routing-QTMR-inputs-through-XBARA/m-p/2168674#M35182</guid>
      <dc:creator>vdpsr</dc:creator>
      <dc:date>2025-09-12T06:51:24Z</dc:date>
    </item>
    <item>
      <title>Re: [MIMXRT1040EVK] Help on Routing QTMR inputs through XBARA</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1040EVK-Help-on-Routing-QTMR-inputs-through-XBARA/m-p/2170476#M35205</link>
      <description>&lt;P&gt;&lt;BR /&gt;Hi !&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;My bad, I did not see those DNP (not mounted) 0ohms on the MIMXRT1040EVK board !&lt;BR /&gt;&lt;BR /&gt;This subject can be resolved now &lt;LI-EMOJI id="lia_slightly-smiling-face" title=":slightly_smiling_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Capture d’écran 2025-09-16 151556.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/357151i10D3308A462EDCAF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Capture d’écran 2025-09-16 151556.png" alt="Capture d’écran 2025-09-16 151556.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;My project works now as expected.&lt;BR /&gt;&lt;BR /&gt;Big thanks to NXP support for pointing out this detail !&lt;BR /&gt;&lt;BR /&gt;See you !  &lt;/P&gt;</description>
      <pubDate>Tue, 16 Sep 2025 13:19:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1040EVK-Help-on-Routing-QTMR-inputs-through-XBARA/m-p/2170476#M35205</guid>
      <dc:creator>vdpsr</dc:creator>
      <dc:date>2025-09-16T13:19:06Z</dc:date>
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