topic Re: HardFault on XBARA_SetOutputSignalConfig in i.MX RT Crossover MCUs

HardFault on XBARA_SetOutputSignalConfig

powerfeatherdev — Fri, 21 Mar 2025 13:20:01 GMT

I'm trying to adapt the RT1020 XBAR example on the RT1010. The sample project for an EVKMIMXRT1010 is attached.

However, there is a HardFault when XBARA_SetOutputSignalConfig is called. Specifically, in the "regVal._u16 = XBARA_CTRLx(base, regIndex)" line, when the CTRL register is accessed.

I don't think it's related to the clock, since I call XBAR_Init which initializes the XBAR clock, and XBARA_SetSignalsConnection succeeds - which accesses registers in the XBAR peripheral.

Why does the HardFault occur?

Re: HardFault on XBARA_SetOutputSignalConfig

powerfeatherdev — Tue, 25 Mar 2025 14:59:57 GMT

Any update regarding this issue?

Re: HardFault on XBARA_SetOutputSignalConfig

EdwinHz — Wed, 26 Mar 2025 21:59:06 GMT

Hi @powerfeatherdev

Please try doing the following changes on your code. First change the XBARA_CTRLx macro to the following XBARA_SELx:

/* Macros for entire XBARA_CTRL register. */ //#define XBARA_CTRLx(base, index) (((volatile uint16_t *)(&((base)->CTRL0)))[(index)]) #define XBARA_SELx(base, output) (((volatile uint16_t *)(&((base)->SEL0)))[(uint32_t)(output) / 2UL])

Then change the XBAR_CTRLx calls to XBAR_SELx on XBARA_SetOutputSignalConfig:

void XBARA_SetOutputSignalConfig(XBARA_Type *base, xbar_output_signal_t output, const xbara_control_config_t *controlConfig) { uint8_t outputIndex = (uint8_t)output; uint8_t regIndex; uint8_t byteInReg; xbara_u8_u16_t regVal; assert(outputIndex < (uint32_t)FSL_FEATURE_XBARA_INTERRUPT_COUNT); regIndex = outputIndex / 2U; byteInReg = outputIndex % 2U; regVal._u16 = XBARA_SELx(base, regIndex); /* Don't clear the status flags. */ regVal._u16 &= (uint16_t)(~(XBARA_CTRL0_STS0_MASK | XBARA_CTRL0_STS1_MASK)); regVal._u8[byteInReg] = (uint8_t)(XBARA_CTRL0_EDGE0(controlConfig->activeEdge) | (uint16_t)(((uint32_t)controlConfig->requestType) << XBARA_CTRL0_DEN0_SHIFT)); XBARA_SELx(base, regIndex) = regVal._u16; }

Let me know if this works.

BR,
Edwin.

Re: HardFault on XBARA_SetOutputSignalConfig

powerfeatherdev — Thu, 27 Mar 2025 03:49:04 GMT

Isn't XBARA_SELx a fundamentally different register than XBARA_CTRLx? See the following snippets of the RT1010 Reference Manual:

So your solution might 'technically' solve the issue of HardFault on calling XBARA_SetOutputSignalConfig, but I don't see how the peripheral would work as I want to - which is to raise an interrupt on XBAR_OUTx edge.

@EdwinHz

Re: HardFault on XBARA_SetOutputSignalConfig

powerfeatherdev — Thu, 27 Mar 2025 06:00:45 GMT

I think I know the issue. Both the reference manual's XBARA memory map and register description, and the SDK's MIMXRT1011.h says that on this chip, the XBARA_SEL is up to XBARA_SEL65 - which means it has 130 outputs.

However, in the RT1010 reference manual's description of the peripheral, it says it only has 31 outputs:

I take it that the actual number of outputs is correct, since when I tried deleting XBARA_SEL16-XBARA_SEL65 in the SDK's MIMXRT1011.h XBARA_Type definition, I was able to configure an interrupt to fire on the output's edge transition.

So I guess the root cause of this is a mistake in the RT1011's SVD definition, from which parts of the reference manual and SDK headers are auto-generated. I think the current definition is mistakenly copied over from RT1020, whch *does* have 130 XBARA outputs.