<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic MIMXRT1166 FLEXSPI_UpdateLUT fails in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1166-FLEXSPI-UpdateLUT-fails/m-p/2037611#M33361</link>
    <description>&lt;P&gt;When trying to update flash LUT, function FLEXSPI_UpdateLUT fails. MCR0-&amp;gt;MDIS is set to zero, so module is not disabled:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;MCR0 = 0xffffa030,
  MCR1 = 0xffffffff,
  MCR2 = 0x200001f7,
  AHBCR = 0x78,
  INTEN = 0x0,
  INTR = 0x41,
  LUTKEY = 0x5af05af0,
  LUTCR = 0x2,
  AHBRXBUFCR0 = {0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80070040},
  RESERVED_0 = {0x0 &amp;lt;repeats 32 times&amp;gt;},
  FLSHCR0 = {0x2000, 0x0, 0x0, 0x0},
  FLSHCR1 = {0x63, 0x10063, 0x10063, 0x10063},
  FLSHCR2 = {0x0, 0x900, 0x900, 0x900},
  RESERVED_1 = {0xc, 0xc, 0x0, 0xd},
  FLSHCR4 = 0x3,
  RESERVED_2 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  IPCR0 = 0x0,
  IPCR1 = 0x10000,
  RESERVED_3 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  IPCMD = 0x0,
  RESERVED_4 = {0x0, 0x0, 0x0, 0x0},
  IPRXFCR = 0x1c,
  IPTXFCR = 0x1c,
  DLLCR = {0x79, 0x100},
  RESERVED_5 = {0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  MISCCR4 = 0x0,
  MISCCR5 = 0x0,
  MISCCR6 = 0x0,
  MISCCR7 = 0x0,
  STS0 = 0x3,
  STS1 = 0x0,
  STS2 = 0x1353,
  AHBSPNDSTS = 0x0,
  IPRXFSTS = 0x0,
  IPTXFSTS = 0x80007,
  RESERVED_6 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  RFDR = {0x8b2007dc, 0x0, 0x0, 0x0, 0x8b200712, 0xa304, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x760, 0x0 &amp;lt;repeats 19 times&amp;gt;},
  TFDR = {0x0 &amp;lt;repeats 32 times&amp;gt;},
  LUT = {0x8b2007fd, 0xa704b306, 0x0, 0x0, 0x4000481, 0x4000400, 0x2001, 0x0, 0x799, 0x0 &amp;lt;repeats 55 times&amp;gt;},
  RESERVED_7 = {0x0 &amp;lt;repeats 256 times&amp;gt;},
  HMSTRCR = {0x40ffcf, 0xffcf, 0x4f00f, 0x22807f, 0x32f87f, 0x11f87f, 0x0, 0x0},
  HADDRSTART = 0x0,
  HADDREND = 0x0,
  HADDROFFSET = 0x0&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Debug sessions gets killed at the instance when code tries to&amp;nbsp; update the LUT:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;lutBase&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;cmd&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I haven't found a way to interrogate the processor as debugger disconnects.&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
    <pubDate>Tue, 04 Feb 2025 09:36:55 GMT</pubDate>
    <dc:creator>tbonkers</dc:creator>
    <dc:date>2025-02-04T09:36:55Z</dc:date>
    <item>
      <title>MIMXRT1166 FLEXSPI_UpdateLUT fails</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1166-FLEXSPI-UpdateLUT-fails/m-p/2037611#M33361</link>
      <description>&lt;P&gt;When trying to update flash LUT, function FLEXSPI_UpdateLUT fails. MCR0-&amp;gt;MDIS is set to zero, so module is not disabled:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;MCR0 = 0xffffa030,
  MCR1 = 0xffffffff,
  MCR2 = 0x200001f7,
  AHBCR = 0x78,
  INTEN = 0x0,
  INTR = 0x41,
  LUTKEY = 0x5af05af0,
  LUTCR = 0x2,
  AHBRXBUFCR0 = {0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80070040},
  RESERVED_0 = {0x0 &amp;lt;repeats 32 times&amp;gt;},
  FLSHCR0 = {0x2000, 0x0, 0x0, 0x0},
  FLSHCR1 = {0x63, 0x10063, 0x10063, 0x10063},
  FLSHCR2 = {0x0, 0x900, 0x900, 0x900},
  RESERVED_1 = {0xc, 0xc, 0x0, 0xd},
  FLSHCR4 = 0x3,
  RESERVED_2 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  IPCR0 = 0x0,
  IPCR1 = 0x10000,
  RESERVED_3 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  IPCMD = 0x0,
  RESERVED_4 = {0x0, 0x0, 0x0, 0x0},
  IPRXFCR = 0x1c,
  IPTXFCR = 0x1c,
  DLLCR = {0x79, 0x100},
  RESERVED_5 = {0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  MISCCR4 = 0x0,
  MISCCR5 = 0x0,
  MISCCR6 = 0x0,
  MISCCR7 = 0x0,
  STS0 = 0x3,
  STS1 = 0x0,
  STS2 = 0x1353,
  AHBSPNDSTS = 0x0,
  IPRXFSTS = 0x0,
  IPTXFSTS = 0x80007,
  RESERVED_6 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
  RFDR = {0x8b2007dc, 0x0, 0x0, 0x0, 0x8b200712, 0xa304, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x760, 0x0 &amp;lt;repeats 19 times&amp;gt;},
  TFDR = {0x0 &amp;lt;repeats 32 times&amp;gt;},
  LUT = {0x8b2007fd, 0xa704b306, 0x0, 0x0, 0x4000481, 0x4000400, 0x2001, 0x0, 0x799, 0x0 &amp;lt;repeats 55 times&amp;gt;},
  RESERVED_7 = {0x0 &amp;lt;repeats 256 times&amp;gt;},
  HMSTRCR = {0x40ffcf, 0xffcf, 0x4f00f, 0x22807f, 0x32f87f, 0x11f87f, 0x0, 0x0},
  HADDRSTART = 0x0,
  HADDREND = 0x0,
  HADDROFFSET = 0x0&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Debug sessions gets killed at the instance when code tries to&amp;nbsp; update the LUT:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;lutBase&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;cmd&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I haven't found a way to interrogate the processor as debugger disconnects.&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Tue, 04 Feb 2025 09:36:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1166-FLEXSPI-UpdateLUT-fails/m-p/2037611#M33361</guid>
      <dc:creator>tbonkers</dc:creator>
      <dc:date>2025-02-04T09:36:55Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1166 FLEXSPI_UpdateLUT fails</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1166-FLEXSPI-UpdateLUT-fails/m-p/2039275#M33392</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183978"&gt;@tbonkers&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I think you can refer to the SDK flexspi example&amp;nbsp;FLEXSPI_UpdateLUT function.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)
{
    assert(index &amp;lt; 64U);

    uint32_t i = 0;
    volatile uint32_t *lutBase;

    /* Wait for bus to be idle before changing flash configuration. */
    while (!FLEXSPI_GetBusIdleStatus(base))
    {
    }

    /* Unlock LUT for update. */
#if !((defined(FSL_FEATURE_FLEXSPI_LUTKEY_IS_RO)) &amp;amp;&amp;amp; (FSL_FEATURE_FLEXSPI_LUTKEY_IS_RO))
    base-&amp;gt;LUTKEY = FLEXSPI_LUT_KEY_VAL;
#endif
    base-&amp;gt;LUTCR = 0x02;

    lutBase = &amp;amp;base-&amp;gt;LUT[index];
    for (i = 0; i &amp;lt; count; i++)
    {
        *lutBase++ = *cmd++;
    }

    /* Lock LUT. */
#if !((defined(FSL_FEATURE_FLEXSPI_LUTKEY_IS_RO)) &amp;amp;&amp;amp; (FSL_FEATURE_FLEXSPI_LUTKEY_IS_RO))
    base-&amp;gt;LUTKEY = FLEXSPI_LUT_KEY_VAL;
#endif
    base-&amp;gt;LUTCR = 0x01;
}&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
      <pubDate>Thu, 06 Feb 2025 10:46:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/MIMXRT1166-FLEXSPI-UpdateLUT-fails/m-p/2039275#M33392</guid>
      <dc:creator>Harry_Zhang</dc:creator>
      <dc:date>2025-02-06T10:46:30Z</dc:date>
    </item>
  </channel>
</rss>

