topic Re: i.MX RT 1176 multicore example 'Hello World' in i.MX RT Crossover MCUs

i.MX RT 1176 multicore example 'Hello World'

chandan_uv — Wed, 29 Jan 2025 09:37:24 GMT

Hello, I just started with i.MX RT and exploring the multicore functionality using reference manual and application note AN13264. I am exploring with the example code SDK root/boards/evkmimxrt1170/multicore_examples/hello_world. I am facing below issue in MCUXpresso IDE.

From application node I got the understanding if I need to run the core 1 (m4) from core0 (m7). As per my understanding image of cm4 will be stored with cm7 in flexspi and later will be move to alias 0x20200000 by cm7. I need to use the macro CORE1_IMAGE_COPY_TO_RAM so I enabled same in hello_world_cm7 in the preprocessor but compiler unable to find the value of core1_image_size and CORE1_IMAGE_START, Can someone help me out in this ? also let me know if I am missing anything in my understanding.

Thanks

Re: i.MX RT 1176 multicore example 'Hello World'

EdwinHz — Thu, 30 Jan 2025 20:46:59 GMT

Hi @chandan_uv,

Please refer to this link to see how to enable CORE1_IMAGE_COPY_TO_RAM.
https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-move-CM4-core-project-to-SDRAM-in-RT1176/ta-p/1363185

BR,
Edwin.

Re: i.MX RT 1176 multicore example 'Hello World'

chandan_uv — Fri, 31 Jan 2025 05:47:25 GMT

Hi @EdwinHz , Do you mean macro CORE1_IMAGE_COPY_TO_RAM is for running m4 from SRAM. From application not its seems like it is for running loading the cm4 firmware from flexspi and then running from the 128K ITCM ? Please correct my understanding incase I am wrong.

As per my current standing it follows below process.

Image of cm4 will be stored with cm7 in flexspi and later will be move to alias 0x20200000 by cm7.

Re: i.MX RT 1176 multicore example 'Hello World'

chandan_uv — Tue, 04 Feb 2025 05:51:04 GMT

hi @EdwinHz Did you got the chance to check ?

Regards,
Chandan