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    <title>topic Re: Regarding the limitations of Key Scramble settings in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2024686#M33137</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/239836"&gt;@Omar_hong&lt;/a&gt;，&lt;/P&gt;
&lt;P&gt;Thanks for your patience!&lt;/P&gt;
&lt;P&gt;I got feedback from the internal team that&amp;nbsp;&lt;SPAN&gt;there is not a limitation to the configuration values of scramble and align, nor the order in which the fuses are burnt.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Re-reading the customer's test case shows that there is still something missed. The customer did not use the NXP EVK to try to burn non-defaults, only this case failed and was cross-referenced to reach the above conclusion.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 09 Jan 2025 09:09:37 GMT</pubDate>
    <dc:creator>Gavin_Jia</dc:creator>
    <dc:date>2025-01-09T09:09:37Z</dc:date>
    <item>
      <title>Regarding the limitations of Key Scramble settings</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2019605#M32990</link>
      <description>&lt;P&gt;Hi NXP&lt;/P&gt;&lt;P&gt;According to NXP application note, OTFAD_KEY_SCRAMBLE and ALIGN were arbitrary word and byte.&lt;/P&gt;&lt;P&gt;But when I set non-SPT default values (0x33AA55CC &amp;amp; 0x1B), the RT10101 fails to decrypt and boot .[On my EVT board] .It stops in ISP mdoe.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;===================================================================&lt;BR /&gt;On the NXP RT1010 EVB, writing the default settings(0x33AA55CC &amp;amp; 0x1B) allows it to boot successfully.&lt;/P&gt;&lt;P&gt;The following are the steps on NXP EVB&lt;/P&gt;&lt;P&gt;Step 1. Burning fuses[OTFAD KEK &amp;amp; SCRAMBLE] =&amp;gt; boot successfully.&lt;BR /&gt;Step 2. Burning fuses[HAB] =&amp;gt; boot successfully.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;===================================================================&lt;BR /&gt;On non-NXP EVB device, writing the non-default settings ,the RT10101 fails to decrypt and boot and stops in ISP mdoe.&lt;BR /&gt;The following are the steps on my EVT board&lt;/P&gt;&lt;P&gt;Step 1. Burning fuses[OTFAD KEK] =&amp;gt; boot successfully.&lt;BR /&gt;Step 2. Burning fuses[HAB] =&amp;gt; boot successfully.&lt;BR /&gt;Step 3. Burning fuses[SCRAMBLE] =&amp;gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;FONT color="#FF0000"&gt;boot Fail.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I use SPT for programming, and during the programming process, it will verify that the SPT fuses settings match the device. Therefore, my settings should be correctly written to my EVT board.&lt;/P&gt;&lt;P&gt;Using the SPT OTP setting function, I also confirmed that my settings were successfully written to the eFuses.&lt;/P&gt;&lt;P&gt;I tried changing the OTFAD encryption block to an unwritten block (e.g., 0x60020000), and my EVT board can boot normally.&lt;BR /&gt;=&amp;gt;This indicates that there might be an issue with the decryption process.&lt;BR /&gt;===================================================================&lt;/P&gt;&lt;P&gt;Based on the above successful and failed boot cases:&lt;/P&gt;&lt;P&gt;1. Does the order of writing eFuses affect the functionality of OTFAD and Scramble?&lt;/P&gt;&lt;P&gt;2. Are there any configuration limitations for OTFAD_KEY_SCRAMBLE and ALIGN?&lt;/P&gt;&lt;P&gt;Does this mean there is an issue with OTFAD and Scramble?&lt;/P&gt;</description>
      <pubDate>Thu, 26 Dec 2024 08:07:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2019605#M32990</guid>
      <dc:creator>Omar_hong</dc:creator>
      <dc:date>2024-12-26T08:07:59Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding the limitations of Key Scramble settings</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2020995#M33036</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/239836"&gt;@Omar_hong&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Really thanks for your detailed test.&lt;/P&gt;
&lt;P&gt;I have reported your test results to the internal team and it will take some time to get feedback. I will sync with you here as soon as I hear something.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;</description>
      <pubDate>Thu, 02 Jan 2025 03:39:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2020995#M33036</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2025-01-02T03:39:51Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding the limitations of Key Scramble settings</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2021130#M33044</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203261"&gt;@Gavin_Jia&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;Thank you for your reply. If there are any details or questions you want to know, please let me know as soon as possible.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 02 Jan 2025 08:10:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2021130#M33044</guid>
      <dc:creator>Omar_hong</dc:creator>
      <dc:date>2025-01-02T08:10:40Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding the limitations of Key Scramble settings</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2024686#M33137</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/239836"&gt;@Omar_hong&lt;/a&gt;，&lt;/P&gt;
&lt;P&gt;Thanks for your patience!&lt;/P&gt;
&lt;P&gt;I got feedback from the internal team that&amp;nbsp;&lt;SPAN&gt;there is not a limitation to the configuration values of scramble and align, nor the order in which the fuses are burnt.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Re-reading the customer's test case shows that there is still something missed. The customer did not use the NXP EVK to try to burn non-defaults, only this case failed and was cross-referenced to reach the above conclusion.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Jan 2025 09:09:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Regarding-the-limitations-of-Key-Scramble-settings/m-p/2024686#M33137</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2025-01-09T09:09:37Z</dc:date>
    </item>
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