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    <title>i.MX RT Crossover MCUsのトピックRe: USB Host MSD FATFS driver performance when cache is enabled</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983280#M32379</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193658"&gt;@RichardY&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I believe you describe the issue that is seen on the following knowledge base article:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs-Knowledge/Using-NonCached-Memory-on-i-MXRT/ta-p/1183369" target="_blank"&gt;Using NonCached Memory on i.MXRT - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Please use non-cacheable TCM as the article suggests in order to have the best possible performance on USB middleware.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
    <pubDate>Mon, 28 Oct 2024 21:48:25 GMT</pubDate>
    <dc:creator>EdwinHz</dc:creator>
    <dc:date>2024-10-28T21:48:25Z</dc:date>
    <item>
      <title>USB Host MSD FATFS driver performance when cache is enabled</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983251#M32377</link>
      <description>&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Hi,&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;I am using RT1170 processor. We got some performance issue with USB Host MSD FAT file system when placing the data on SDRAM or OCSRAM. I am trying to use an SDK example to demonstrate the issue. I am not sure if anyone experienced this issue?&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;STRONG&gt;Setup 1, Original RT1170 SDK example&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Import SDK example host_msd_fatfst_freertos_cm7.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Change &amp;nbsp;MCU_CORE_CLOCK from 120000000 to 998000000 to reflect the correct CPU core clock frequency.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Change MSD_FATFS_THROUGHPUT_TEST_ENABLE from 0 to 1 so the code will measure USB MSD read and write speed.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Build the project. The code is XIP from the NOR flash. BSS segment, stack and heap are put on the DTC.&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_0-1730145925244.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307311i9CF536DE1E192EDF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_0-1730145925244.png" alt="RichardY_0-1730145925244.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;The following results are printed on debug console. The read speed is around 25MB/s.&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_1-1730147550992.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307315iD80DCE5EDCD40F3A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_1-1730147550992.png" alt="RichardY_1-1730147550992.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;STRONG&gt;Setup 2, Original example + BSS segment, stack and heap in OCSRAM (set to non-cacheable)&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 1 step 1.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 1 step 2&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 1 step 3.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Move SRAM_OC1 to first RAM option in the table of MCU setting.&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_5-1730147804293.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307319iD93EF1E8681BB172/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_5-1730147804293.png" alt="RichardY_5-1730147804293.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Disable the cache on OCRAM by changing the value in board.c file from 1 to 0 as highlighted in the following&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_3-1730147691700.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307317i11A7EEEC5B97E1E2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_3-1730147691700.png" alt="RichardY_3-1730147691700.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;SPAN&gt;Build the project. The code is XIP from the NOR flash. BSS segment, stack and heap are put on the OCSRAM.&lt;/SPAN&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_4-1730147720201.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307318i20AE041B38070481/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_4-1730147720201.png" alt="RichardY_4-1730147720201.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;The following results are printed on debug console. The read speed is around 22MB/s.&lt;/FONT&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;STRONG&gt;Setup 3, Original example + DATA_SECTION_IS_CACHEABLE=1 + default ram is OCSRAM (set to cacheable)&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 2 step 1.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 2 step 2.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 2 step 3.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Same as Setup 2 step 4.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Set DATA_SECTION_IS_CACHEABLE=1 in preprocessor.&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_6-1730147837890.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307321iC56C840D825B0033/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_6-1730147837890.png" alt="RichardY_6-1730147837890.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Build the project. The code is XIP from the NOR flash. USB related data is in DTC. Other BSS segment, stack and heap are put on the OCSRAM.&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_7-1730147876822.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307323i5C0BE7BA8DE4EF57/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_7-1730147876822.png" alt="RichardY_7-1730147876822.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.&lt;/FONT&gt;&lt;/LI&gt;&lt;LI&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;The following results are printed on debug console. &lt;STRONG&gt;The read speed is less than 0.5MB/s&lt;/STRONG&gt;. &lt;STRONG&gt;I do not think this speed is normal with cache enabled.&lt;/STRONG&gt; What have I got wrong?&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RichardY_8-1730147919682.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/307325iB0DBD6700973E825/image-size/medium?v=v2&amp;amp;px=400" role="button" title="RichardY_8-1730147919682.png" alt="RichardY_8-1730147919682.png" /&gt;&lt;/span&gt;&lt;/FONT&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Thanks and regards,&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="arial,helvetica,sans-serif"&gt;Richard&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 28 Oct 2024 20:50:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983251#M32377</guid>
      <dc:creator>RichardY</dc:creator>
      <dc:date>2024-10-28T20:50:46Z</dc:date>
    </item>
    <item>
      <title>Re: USB Host MSD FATFS driver performance when cache is enabled</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983280#M32379</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193658"&gt;@RichardY&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I believe you describe the issue that is seen on the following knowledge base article:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs-Knowledge/Using-NonCached-Memory-on-i-MXRT/ta-p/1183369" target="_blank"&gt;Using NonCached Memory on i.MXRT - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Please use non-cacheable TCM as the article suggests in order to have the best possible performance on USB middleware.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Mon, 28 Oct 2024 21:48:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983280#M32379</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-10-28T21:48:25Z</dc:date>
    </item>
    <item>
      <title>Re: USB Host MSD FATFS driver performance when cache is enabled</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983287#M32380</link>
      <description>&lt;P&gt;Hi EdwinHz,&lt;/P&gt;&lt;P&gt;Yes, I did following the example. When&amp;nbsp;&lt;SPAN&gt;DATA_SECTION_IS_CACHEABLE=1 is set, DMA buffer and other USB data objects are put into the DTC. However, the speed is also significantly slower after setting&amp;nbsp;DATA_SECTION_IS_CACHEABLE=1. I can see when&amp;nbsp;DATA_SECTION_IS_CACHEABLE=1 is set it also enables extra code, not sure if those extra code are significantly slowing down the USB driver.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thanks and regards,&lt;/P&gt;&lt;P&gt;Richard&lt;/P&gt;</description>
      <pubDate>Mon, 28 Oct 2024 21:54:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/USB-Host-MSD-FATFS-driver-performance-when-cache-is-enabled/m-p/1983287#M32380</guid>
      <dc:creator>RichardY</dc:creator>
      <dc:date>2024-10-28T21:54:12Z</dc:date>
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