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    <title>topic I2S data offset when stream is interrupted in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1868698#M30476</link>
    <description>&lt;H3&gt;The setup&lt;/H3&gt;&lt;P&gt;Using the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK MIMXRT685&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;as&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;SLAVE configured as:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;TDM / DSP mode A (mono)&lt;/LI&gt;&lt;LI&gt;48kHz (SCK at ~25MHz)&lt;/LI&gt;&lt;LI&gt;16 slots (channels) per frame&lt;/LI&gt;&lt;LI&gt;512 SCK per frame&lt;/LI&gt;&lt;LI&gt;32 SCK per slot&lt;/LI&gt;&lt;LI&gt;32 bits of audio data per slot, left aligned&lt;/LI&gt;&lt;LI&gt;WS pulsed for one SCK time&lt;/LI&gt;&lt;LI&gt;Data sampled on WS rising edge&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;The following is a sample trace:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-left" image-alt="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/279579i53504DD475FA20EE/image-size/large?v=v2&amp;amp;px=999" role="button" title="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" alt="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;H3&gt;&amp;nbsp;&lt;/H3&gt;&lt;P&gt;Now let's see what is the problem.&lt;/P&gt;&lt;H3&gt;The problem&lt;/H3&gt;&lt;P&gt;I'm interested in the RX path, that is using the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;to record data received on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;interface sent for example by a PC. For the sake of simplicity let's assume that from the PC I'm streaming data only of the first channel out of 16.&lt;/P&gt;&lt;P&gt;We can do that by doing for example on a Linux machine:&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;PRE&gt;speaker-test -r 48000 -c 16 -f 1000 -F S32_LE -D hw:APE,1 -t sine -s 1&lt;/PRE&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;With this command we are sending through the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;interface a stream of data at 48kHz / 16 channels /&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;S32_LE&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;with a 1kHz sine wave only on the first channel, all the other channels are silent.&lt;/P&gt;&lt;P&gt;We try to send this data through several times, but instead of waiting for the stream to finish, we interrupt the streaming several times by pressing&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CTRL+C&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;and giving the command again. This is possibly interrupting the stream of data mid-frame and restarting it from scratch.&lt;/P&gt;&lt;H3&gt;What do we expect to see on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;side&lt;/H3&gt;&lt;P&gt;We would expect to see in the I2S RX buffer something like this when the command is running (each&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;0&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;and&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;X&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;is 1 byte):&lt;/P&gt;&lt;PRE&gt;CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH1  CH2  CH3...&lt;BR /&gt;XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 XXXX 0000 0000...&lt;/PRE&gt;&lt;P&gt;&lt;SPAN&gt;That is we expect to see data only on the Channel 1 and zeros on all the other channels when the command is streaming out data.&lt;/SPAN&gt;&lt;/P&gt;&lt;H3&gt;What we actually see on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;side&lt;/H3&gt;&lt;P&gt;What actually happens is that the data is found on a different channel than 1. An offset is introduced in the recorded data.&lt;/P&gt;&lt;P&gt;For example:&lt;/P&gt;&lt;PRE&gt;CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH1  CH2  CH3...&lt;BR /&gt;0000 0000 0000 0000 0000 0000 XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000...&lt;/PRE&gt;&lt;P&gt;In this case the data that is supposed to be on&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CH1, it is found on&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CH7&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;instead.&lt;/P&gt;&lt;H3&gt;The reproducer&lt;/H3&gt;&lt;P&gt;At&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://gist.github.com/carlocaione/5c471fd25f083110e6c9f3c426874f29" target="_blank" rel="noopener"&gt;https://gist.github.com/carlocaione/5c471fd25f083110e6c9f3c426874f29&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;the reproducer for the problem.&lt;/P&gt;&lt;P&gt;Since we need 16 channels we are using two FLEXCOMM interfaces with signal sharing and we use a ping-pong linked transfer onto two different buffers.&lt;/P&gt;&lt;P&gt;If we set a breakpoint at line 80 and we try to reproduce the issue, we can see that the execution stops at that line after a few attempts because valid data was found in channel 7 instead than channel 1.&lt;/P&gt;&lt;H3&gt;A theory about the issue&lt;/H3&gt;&lt;P&gt;What is possibly happening is that when we stop the streaming of data in the middle of the frame, the data in the FIFO up to that point is still flushed in memory, causing the offset when the streaming starts again at a later time.&lt;/P&gt;&lt;PRE&gt;Position in the RX buffer: CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16&lt;BR /&gt;Data transmitted :         XXXX 0000 0000 0000 0000 0000 XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 &lt;BR /&gt;                           ^                             ^&lt;BR /&gt;                           RX is started                 Here we stop the streaming and start it again&lt;/PRE&gt;&lt;H3&gt;Open questions&lt;/H3&gt;&lt;P&gt;&lt;SPAN&gt;A reasonable expectation to me about the behaviour of&amp;nbsp;&lt;/SPAN&gt;I2S + DMA&lt;SPAN&gt;&amp;nbsp;is that when the data is flushed to memory, this is done in chunks that are multiple of the size of the frame (64 bytes in this case) otherwise how can we detect when only part of the frame has been flushed to memory especially when using loop descriptors?&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
    <pubDate>Mon, 20 May 2024 08:15:47 GMT</pubDate>
    <dc:creator>carlocaione</dc:creator>
    <dc:date>2024-05-20T08:15:47Z</dc:date>
    <item>
      <title>I2S data offset when stream is interrupted</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1868698#M30476</link>
      <description>&lt;H3&gt;The setup&lt;/H3&gt;&lt;P&gt;Using the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK MIMXRT685&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;as&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;SLAVE configured as:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;TDM / DSP mode A (mono)&lt;/LI&gt;&lt;LI&gt;48kHz (SCK at ~25MHz)&lt;/LI&gt;&lt;LI&gt;16 slots (channels) per frame&lt;/LI&gt;&lt;LI&gt;512 SCK per frame&lt;/LI&gt;&lt;LI&gt;32 SCK per slot&lt;/LI&gt;&lt;LI&gt;32 bits of audio data per slot, left aligned&lt;/LI&gt;&lt;LI&gt;WS pulsed for one SCK time&lt;/LI&gt;&lt;LI&gt;Data sampled on WS rising edge&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;The following is a sample trace:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-left" image-alt="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/279579i53504DD475FA20EE/image-size/large?v=v2&amp;amp;px=999" role="button" title="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" alt="320804746-f938ab01-3ef3-4bc8-a466-723e47db15c4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;H3&gt;&amp;nbsp;&lt;/H3&gt;&lt;P&gt;Now let's see what is the problem.&lt;/P&gt;&lt;H3&gt;The problem&lt;/H3&gt;&lt;P&gt;I'm interested in the RX path, that is using the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;to record data received on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;interface sent for example by a PC. For the sake of simplicity let's assume that from the PC I'm streaming data only of the first channel out of 16.&lt;/P&gt;&lt;P&gt;We can do that by doing for example on a Linux machine:&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;PRE&gt;speaker-test -r 48000 -c 16 -f 1000 -F S32_LE -D hw:APE,1 -t sine -s 1&lt;/PRE&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;With this command we are sending through the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;I2S&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;interface a stream of data at 48kHz / 16 channels /&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;S32_LE&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;with a 1kHz sine wave only on the first channel, all the other channels are silent.&lt;/P&gt;&lt;P&gt;We try to send this data through several times, but instead of waiting for the stream to finish, we interrupt the streaming several times by pressing&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CTRL+C&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;and giving the command again. This is possibly interrupting the stream of data mid-frame and restarting it from scratch.&lt;/P&gt;&lt;H3&gt;What do we expect to see on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;side&lt;/H3&gt;&lt;P&gt;We would expect to see in the I2S RX buffer something like this when the command is running (each&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;0&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;and&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;X&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;is 1 byte):&lt;/P&gt;&lt;PRE&gt;CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH1  CH2  CH3...&lt;BR /&gt;XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 XXXX 0000 0000...&lt;/PRE&gt;&lt;P&gt;&lt;SPAN&gt;That is we expect to see data only on the Channel 1 and zeros on all the other channels when the command is streaming out data.&lt;/SPAN&gt;&lt;/P&gt;&lt;H3&gt;What we actually see on the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;EVK&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;side&lt;/H3&gt;&lt;P&gt;What actually happens is that the data is found on a different channel than 1. An offset is introduced in the recorded data.&lt;/P&gt;&lt;P&gt;For example:&lt;/P&gt;&lt;PRE&gt;CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH1  CH2  CH3...&lt;BR /&gt;0000 0000 0000 0000 0000 0000 XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000...&lt;/PRE&gt;&lt;P&gt;In this case the data that is supposed to be on&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CH1, it is found on&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CH7&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;instead.&lt;/P&gt;&lt;H3&gt;The reproducer&lt;/H3&gt;&lt;P&gt;At&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://gist.github.com/carlocaione/5c471fd25f083110e6c9f3c426874f29" target="_blank" rel="noopener"&gt;https://gist.github.com/carlocaione/5c471fd25f083110e6c9f3c426874f29&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;the reproducer for the problem.&lt;/P&gt;&lt;P&gt;Since we need 16 channels we are using two FLEXCOMM interfaces with signal sharing and we use a ping-pong linked transfer onto two different buffers.&lt;/P&gt;&lt;P&gt;If we set a breakpoint at line 80 and we try to reproduce the issue, we can see that the execution stops at that line after a few attempts because valid data was found in channel 7 instead than channel 1.&lt;/P&gt;&lt;H3&gt;A theory about the issue&lt;/H3&gt;&lt;P&gt;What is possibly happening is that when we stop the streaming of data in the middle of the frame, the data in the FIFO up to that point is still flushed in memory, causing the offset when the streaming starts again at a later time.&lt;/P&gt;&lt;PRE&gt;Position in the RX buffer: CH1  CH2  CH3  CH4  CH5  CH6  CH7  CH8  CH9  CH10 CH11 CH12 CH13 CH14 CH15 CH16&lt;BR /&gt;Data transmitted :         XXXX 0000 0000 0000 0000 0000 XXXX 0000 0000 0000 0000 0000 0000 0000 0000 0000 &lt;BR /&gt;                           ^                             ^&lt;BR /&gt;                           RX is started                 Here we stop the streaming and start it again&lt;/PRE&gt;&lt;H3&gt;Open questions&lt;/H3&gt;&lt;P&gt;&lt;SPAN&gt;A reasonable expectation to me about the behaviour of&amp;nbsp;&lt;/SPAN&gt;I2S + DMA&lt;SPAN&gt;&amp;nbsp;is that when the data is flushed to memory, this is done in chunks that are multiple of the size of the frame (64 bytes in this case) otherwise how can we detect when only part of the frame has been flushed to memory especially when using loop descriptors?&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 20 May 2024 08:15:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1868698#M30476</guid>
      <dc:creator>carlocaione</dc:creator>
      <dc:date>2024-05-20T08:15:47Z</dc:date>
    </item>
    <item>
      <title>回复： I2S data offset when stream is interrupted</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1895733#M31039</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231515"&gt;@carlocaione&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I apologize for the late response. I have spent the time contacting the relevant internal experts to address the issues you mentioned.&lt;/P&gt;
&lt;P&gt;Now there's a couple of pieces of information that I need to check with you, the first being how the PC is connected to the board, the&lt;/P&gt;
&lt;P&gt;1. Audio from PC via USB Audio&lt;/P&gt;
&lt;P&gt;2. Audio interface from PC directly connected to the board's codec&lt;/P&gt;
&lt;P&gt;3. PC directly outputs I2S data by some means and then connects to the Flexcomm interface&lt;/P&gt;
&lt;P&gt;Also, can you help with the waveform graph of the I2S at the moment when Ctrl-C is performed? This will help us to localize the problem. Thanks in advance!&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jun 2024 07:22:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1895733#M31039</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2024-06-28T07:22:15Z</dc:date>
    </item>
    <item>
      <title>Re: I2S data offset when stream is interrupted</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1895749#M31040</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203261"&gt;@Gavin_Jia&lt;/a&gt;&amp;nbsp;the problem was confirmed and better analysed here&amp;nbsp;&lt;A href="https://github.com/nxp-mcuxpresso/mcux-sdk/issues/197" target="_blank"&gt;https://github.com/nxp-mcuxpresso/mcux-sdk/issues/197&lt;/A&gt;&amp;nbsp;I was also able to find a workaround that I describe in that thread. So I'm going to close this ticket down and people can refer to the github issue for more informations&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jun 2024 07:47:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/I2S-data-offset-when-stream-is-interrupted/m-p/1895749#M31040</guid>
      <dc:creator>carlocaione</dc:creator>
      <dc:date>2024-06-28T07:47:41Z</dc:date>
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