<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic 回复： Freertos LWIP http server without external SDRAM in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Freertos-LWIP-http-server-without-external-SDRAM/m-p/1867800#M30430</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/197065"&gt;@stefanardo&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;If your project is based on the MCUXpresso IDE, you can easily delete the SDRAM space and modify NCACHE_REGION to a piece of space from OCRAM.&lt;/P&gt;
&lt;P&gt;Please run your project after making this change and try it again, see these two links:&lt;/P&gt;
&lt;P&gt;1.&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT/NCACHE-REGION-issue-on-RT1024/m-p/1796363" target="_blank"&gt;NCACHE_REGION issue on RT1024 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;2.&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT/NCACHE-region-in-internal-RAM-IMXRT1021/m-p/1317731" target="_blank"&gt;已解决: NCACHE region in internal RAM IMXRT1021 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;</description>
    <pubDate>Fri, 17 May 2024 07:16:34 GMT</pubDate>
    <dc:creator>Gavin_Jia</dc:creator>
    <dc:date>2024-05-17T07:16:34Z</dc:date>
    <item>
      <title>Freertos LWIP http server without external SDRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Freertos-LWIP-http-server-without-external-SDRAM/m-p/1865512#M30334</link>
      <description>&lt;P&gt;I am using iMXRT1021 with a custom board and I am having trouble with the http server example.&lt;/P&gt;&lt;P&gt;My board does not have an external SDRAM and&amp;nbsp; I am using the freertos sdk example simply changing the memory sequence and and some pins. I can compile and run it but I cannot have any ethernet activity and I never receive a packet,&lt;/P&gt;&lt;P&gt;With the baremetal example all works fine...&lt;/P&gt;&lt;P&gt;Is possible to have this kind of application with a board without external memory?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards.&lt;/P&gt;&lt;P&gt;Stefano&lt;/P&gt;</description>
      <pubDate>Tue, 14 May 2024 15:30:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Freertos-LWIP-http-server-without-external-SDRAM/m-p/1865512#M30334</guid>
      <dc:creator>stefanardo</dc:creator>
      <dc:date>2024-05-14T15:30:38Z</dc:date>
    </item>
    <item>
      <title>回复： Freertos LWIP http server without external SDRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Freertos-LWIP-http-server-without-external-SDRAM/m-p/1867800#M30430</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/197065"&gt;@stefanardo&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;If your project is based on the MCUXpresso IDE, you can easily delete the SDRAM space and modify NCACHE_REGION to a piece of space from OCRAM.&lt;/P&gt;
&lt;P&gt;Please run your project after making this change and try it again, see these two links:&lt;/P&gt;
&lt;P&gt;1.&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT/NCACHE-REGION-issue-on-RT1024/m-p/1796363" target="_blank"&gt;NCACHE_REGION issue on RT1024 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;2.&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT/NCACHE-region-in-internal-RAM-IMXRT1021/m-p/1317731" target="_blank"&gt;已解决: NCACHE region in internal RAM IMXRT1021 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;</description>
      <pubDate>Fri, 17 May 2024 07:16:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Freertos-LWIP-http-server-without-external-SDRAM/m-p/1867800#M30430</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2024-05-17T07:16:34Z</dc:date>
    </item>
  </channel>
</rss>

