I.MX RT1170 QTMR cascade (ms timer)

italohcx — Fri, 03 May 2024 00:38:08 GMT

Hello

I'm implementing a QTMR timer in cascade mode to have the four 16-bit timers in a 64-bit one, which will be used as a software RTC.

Almost everything works, however I'm unable to write a value for the timer to start from that starting point.

Example: I started the firmware and the QTMR timer started incrementing, a date and time adjustment packet arrived with 1714696372 unix, I need the timer to start counting from this value and increment by 1 every 1ms

Below is my example code.

void QTMR1_StopTimer()

{

QTMR_StopTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_0);

QTMR_StopTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_1);

QTMR_StopTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_2);

QTMR_StopTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_3);

}

void QTMR1_StartTimer()

{

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_3, *kQTMR_CascadeCount*);

/*Configure in cascade mode*/

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_2, *kQTMR_CascadeCount*);

/*Configure in cascade mode*/

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_1, *kQTMR_CascadeCount*);

/* Start the first channel to count on rising edge of the primary source clock */ //UP Counter

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_0, *kQTMR_PriSrcRiseEdge*);

}

void QTMR1_SetValue(TMR_Type *base, uint64_t rtcValue)

{

// Loop for better readability and handling potential future changes

for (int i = 0; i < 4; ++i)

{

// Extract 16-bit value using bit shift and mask

uint16_t channelValue = (uint16_t) (rtcValue >> (16 * i)) & 0xFFFF;

// Set the value for the current channel

base->CHANNEL[i].HOLD = channelValue;

}

uint64_t QTMR1_GetValue64Bits()

{

// Variable to store the combined value of the counters

uint64_t timerValue = 0;

// Array to hold the current values of the 16-bit counters

uint16_t counts[4];

// Retrieve the current values of the counters and store them in the array

counts[0] = QTMR_1_BASEADDR->CHANNEL[0].HOLD;

counts[1] = QTMR_1_BASEADDR->CHANNEL[1].HOLD;

counts[2] = QTMR_1_BASEADDR->CHANNEL[2].HOLD;

counts[3] = QTMR_1_BASEADDR->CHANNEL[3].HOLD;

// Combine the counter values into a single 64-bit value

for (int i = 0; i < 4; ++i)

{

// Convert the 16-bit counter value to a 64-bit integer and left-shift it

// The amount of shift varies based on the counter index in the array

// This ensures proper combining of the values into rtcValue

timerValue += (uint64_t) counts[i] << (i * 16);

rtcValue = (timerValue);

}

//return (rtcValue * 1000) / QTMR_SOURCE_CLOCK_1;

return (rtcValue) / QTMR_SOURCE_CLOCK_1;

}

// can be placed outside main if reused)

int main(void)

{

uint8_t i = 0;

qtmr_config_t qtmrConfig;

/* Board pin, clock, debug console init */

BOARD_ConfigMPU();

BOARD_InitPins();

BOARD_BootClockRUN();

BOARD_InitDebugConsole();

uint32_t initialValueTMRB = initialValue & 0xFFFFFFFF; // Parte de baixo do valor inicial

uint32_t initialValueTMRA = (initialValue >> 32) & 0xFFFFFFFF; // Parte de cima do valor inicial

/* Board pin, clock, debug console init */

BOARD_ConfigMPU();

BOARD_InitPins();

BOARD_BootClockRUN();

BOARD_InitDebugConsole();

clockTimer = QTMR_SOURCE_CLOCK_128;

//Clock 198Mhz

clockSource = QTMR_SOURCE;

PRINTF("\r\nChain Timer use-case, 10 second tick.\n");

qtmrConfig.primarySource = QTMR_PRIMARY_SOURCE_1;

//qtmrConfig.enableMasterMode = true;

qtmrConfig.debugMode = *kQTMR_HaltCounter*;

QTMR_Init(QTMR_1_BASEADDR, QTMR_CHANNEL_0, &qtmrConfig);

/* Init the second channel to use output of the first channel as we are chaining the first channel and the second

* channel */

//qtmrConfig.enableMasterMode = false;

qtmrConfig.primarySource = QTMR_ClockCounterOutput_0;

QTMR_Init(QTMR_1_BASEADDR, QTMR_CHANNEL_1, &qtmrConfig);

qtmrConfig.primarySource = QTMR_ClockCounterOutput_1;

QTMR_Init(QTMR_1_BASEADDR, QTMR_CHANNEL_2, &qtmrConfig);

qtmrConfig.primarySource = QTMR_ClockCounterOutput_2;

QTMR_Init(QTMR_1_BASEADDR, QTMR_CHANNEL_3, &qtmrConfig);

//TMR

//QTMR_SetTimerPeriod(QTMR_1_BASEADDR, QTMR_CHANNEL_0,MSEC_TO_COUNT(1U, QTMR_SOURCE_CLOCK_128));

/* Set period in channels */

// for (int qtmrChannel = 0; qtmrChannel < 4; qtmrChannel++)

// {

// QTMR_SetTimerPeriod(QTMR_1_BASEADDR, qtmrChannel, (uint16_t)( initialValue >> (i * 16)));

// }

QTMR1_SetValue(QTMR_1_BASEADDR, initalValueUnix);

QTMR1_SetValue(QTMR_1_BASEADDR, initialValue);

QTMR_SetTimerPeriod(QTMR_1_BASEADDR, QTMR_CHANNEL_0, 0x0);

QTMR_SetTimerPeriod(QTMR_1_BASEADDR, QTMR_CHANNEL_1, 0x0);

QTMR_SetTimerPeriod(QTMR_1_BASEADDR, QTMR_CHANNEL_2, 0x0);

QTMR_SetTimerPeriod(QTMR_1_BASEADDR, QTMR_CHANNEL_3, 0x0);

/*Set load value */

/*Configure in cascade mode*/

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_3, *kQTMR_CascadeCount*);

/*Configure in cascade mode*/

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_2, *kQTMR_CascadeCount*);

/*Configure in cascade mode*/

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_1, *kQTMR_CascadeCount*);

/* Start the first channel to count on rising edge of the primary source clock */ //UP Counter

QTMR_StartTimer(QTMR_1_BASEADDR, QTMR_CHANNEL_0, *kQTMR_PriSrcRiseEdge*);

for (i = 0; i < 5; i++) {

/* Check whether compare interrupt occurs*/

while (!(qtmrIsrFlag)) {

hold0 = QTMR_1_BASEADDR->CHANNEL[0].HOLD;

hold1 = QTMR_1_BASEADDR->CHANNEL[1].HOLD;

hold2 = QTMR_1_BASEADDR->CHANNEL[2].HOLD;

hold3 = QTMR_1_BASEADDR->CHANNEL[3].HOLD;

value3 = QTMR_GetCurrentTimerCount(QTMR_1_BASEADDR, QTMR_CHANNEL_3);

value2 = QTMR_GetCurrentTimerCount(QTMR_1_BASEADDR, QTMR_CHANNEL_2);

value1 = QTMR_GetCurrentTimerCount(QTMR_1_BASEADDR, QTMR_CHANNEL_1);

value0 = QTMR_GetCurrentTimerCount(QTMR_1_BASEADDR, QTMR_CHANNEL_0);

//valueTMR1 = COUNT_TO_MSEC(get_mclk_count(),QTMR_SOURCE_CLOCK_128) ;

valueTMR1 = get_mclk_count();

valueTMR2 = get_mclk_count2();

value = QTMR1_GetValue64Bits();

if(value > 15 && flag){

QTMR1_StopTimer();

QTMR_1_BASEADDR->CHANNEL[0].LOAD = 0x1;

QTMR_1_BASEADDR->CHANNEL[1].LOAD = 0x1;

QTMR_1_BASEADDR->CHANNEL[2].LOAD = 0x1;

QTMR_1_BASEADDR->CHANNEL[3].LOAD = 0x1;

// QTMR_1_BASEADDR->CHANNEL[0].CTRL = 0x00;

// QTMR_1_BASEADDR->CHANNEL[1].CTRL = 0x00;

// QTMR_1_BASEADDR->CHANNEL[2].CTRL = 0x00;

// QTMR_1_BASEADDR->CHANNEL[3].CTRL = 0x00;

QTMR1_SetValue(QTMR_1_BASEADDR, initalValueUnix);

QTMR1_StartTimer();

flag = false;

}

Re: I.MX RT1170 QTMR cascade (ms timer)

Habib_MS — Tue, 07 May 2024 00:14:44 GMT

Hello @italohcx ,

To load a new count value, you need to provide the value to the "LOAD" register, instead of the "HOLD" register. As shown the reference manual in the chapter 76 called "Quad Timer":

Also, the SDK (version 2.15.1) provides an example of function to set the period in a channel, you can find this function with the name of "QTMR_SetTimerPeriod" in the header file called "fsl_qtmr.h".

BR,

Habib.

Re: I.MX RT1170 QTMR cascade (ms timer)

italohcx — Fri, 10 May 2024 11:36:06 GMT

Hello @Habib_MS

I still haven't quite understood two things:

the increment of the timer in relation to the clock

and how to load this value, because when I reload the mentioned registers the increment looks strange, outside the 1ms range.

BR,

Ítalo.

Re: I.MX RT1170 QTMR cascade (ms timer)

Habib_MS — Tue, 14 May 2024 20:28:57 GMT

Hello again @italohcx ,
Answering your question, the relation that exist between the timer and the clock is how fast the timer increment a value. For example, if you have any timer with a frequency of 1Hz, the timer will increase a value in 1 seg. In your case the Qtimer has the clock frequency of the "Bus clock", in general cases the

"Bus clock" frequency is 198MHz, with this value you can obtain the period of the clock with the follow formula:

Consequently, the time of a count in your Qtimer will be 5.05µ Seg approx.

You can verify your "Bus clock" in the config tool of MCUxpresso IDE, as shows the image below:

I recommend you test the SDK (version 2.15) example "evkbmimxrt1170_qtmr_timer_cm7", which has a channel configured to 1ms as you require. For the cascade configuration we do not any example, but the reference manual has a section that talks about it.

Also, there is a errata about overflow flag and related interrupt, which comes with its respective workaround in the aforementioned example (Please refer to qtmr_timer.c file).

Please check if this error is what is causing the problem.

BR,

Habib.

topic I.MX RT1170 QTMR cascade (ms timer) in i.MX RT Crossover MCUs

I.MX RT1170 QTMR cascade (ms timer)

Re: I.MX RT1170 QTMR cascade (ms timer)

Re: I.MX RT1170 QTMR cascade (ms timer)

Re: I.MX RT1170 QTMR cascade (ms timer)