topic JLink error : Core couldnot be halted in i.MX RT Crossover MCUs

JLink error : Core couldnot be halted

BVmamatha — Fri, 23 Feb 2024 11:13:23 GMT

Hi,

I'm working on a zephyr project and trying to flash zephyr.bin to IMXRT1050 board, but getting core could not halt error.

Please find the logs.

D:\Mamatha_Docs\TinyvisionProject\zephyrproject\zephyr>west -v flash --runner jlink
-- west flash: rebuilding
cmake version 3.27.9 is OK; minimum version is 3.13.1
Running CMake: 'C:\Program Files\CMake\bin\cmake.EXE' --build 'D:\Mamatha_Docs\TinyvisionProject\zephyrproject\zephyr\build'
[1/1] cmd.exe /C "cd /D D:\Mamatha_Docs\TinyvisionProject\...isionProject/zephyrproject/zephyr/build/zephyr/zephyr.elf"
-- west flash: using runner jlink
runners.jlink: JLINKARM_GetDLLVersion()=75000
-- runners.jlink: JLink version: 7.50
runners.jlink: JLink commander script:
ExitOnError 1
r
loadfile "D:\Mamatha_Docs\TinyvisionProject\zephyrproject\zephyr\build\zephyr\zephyr.bin" 0x60000000
g
writeDP 1 0
readDP 1
q
-- runners.jlink: Flashing file: D:\Mamatha_Docs\TinyvisionProject\zephyrproject\zephyr\build\zephyr\zephyr.bin
runners.jlink: 'C:\Program Files\SEGGER\JLink\JLink.exe' -nogui 1 -if swd -speed auto -device MCIMXRT1052 -CommanderScript 'C:\Users\CPUMAS~1\AppData\Local\Temp\tmp4qxtki9njlink\runner.jlink' -nogui 1
SEGGER J-Link Commander V7.50 (Compiled Jul 1 2021 17:43:13)
DLL version V7.50, compiled Jul 1 2021 17:41:53

J-Link Command File read successfully.
Processing script file...

J-Link Commander will now exit on Error

J-Link connection not established yet but required for command.
Connecting to J-Link via USB...O.K.
Firmware: J-Link Lite V9 compiled Feb 2 2021 16:32:48
Hardware version: V9.00
S/N: 229003329
License(s): GDB
VTref=3.218V
Target connection not established yet but required for command.
Device "MIMXRT1052XXXXA" selected.

Connecting to target via SWD
Found SW-DP with ID 0x0BD11477
DPIDR: 0x0BD11477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x04770041)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI
ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7
ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
Cache: No cache
Cortex-M7 identified.
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
ResetTarget() start
CPU could not be halted
Core did not halt on reset vector. Assuming faulty image.
Resetting and halting core on image verification value read.
Core did not halt after reset step 1
ResetTarget() end

Downloading file [D:\Mamatha_Docs\TinyvisionProject\zephyrproject\zephyr\build\zephyr\zephyr.bin]...
Comparing flash [100%] Done.

****** Error: Timeout while preparing target, core does not stop. (PC = 0x2000017E, XPSR = 0x4100000F, SP = 0x20000B18)!
Failed to initialize RAMCodeTimeout while preparing target, core does not stop. (PC = 0x2000017A, XPSR = 0x4100000F, SP = 0x20000B18)!
Failed to initialize RAMCode
Unspecified error -1

Script processing completed.

Re: JLink error : Core couldnot be halted

EdwinHz — Mon, 26 Feb 2024 18:13:06 GMT

Hi @BVmamatha,

More than the "CPU could not be halted", I would pay attention to the "Core did not halt on reset vector. Assuming faulty image." It seems like the image is faulty, so you need to erase the image as it will not be able to boot as long as the CPU is trying to boot it. The following article describes the process of doing a mass erase to regain debugger access to the CPU. RT board recovery for debugger connect issues - NXP Community

Please follow the instructions shown on this article and try executing a different image that is proven to work (like an example code from our SDK) in order to ensure the mass erase was executed properly, the debugger has access to the CPU, and the CPU can execute the image properly.

BR,
Edwin.

Re: JLink error : Core couldnot be halted

BVmamatha — Wed, 28 Feb 2024 06:23:48 GMT

Hi Edwin,

I tried to erase flash using MCUXpresso IDE and I get this error. Please check the log.

Executing flash operation 'Erase' (Erase flash) - Wed Feb 28 11:49:22 IST 2024

Checking MCU info...

Scanning for targets...

Executing flash action...

MCUXpresso IDE RedlinkMulti Driver v11.9 (Dec 11 2023 18:02:10 - crt_emu_cm_redlink.exe build 2)

( 0) Reading remote configuration

Wc(03). No cache support.

Found chip XML file in C:/Users/C P Umashankar/Documents/MCUXpressoIDE_11.9.0_2144/workspace/evkbimxrt1050_hello_world/Debug\MIMXRT1052xxxxB.xml

( 5) Remote configuration complete

Reconnected to existing LinkServer process.

============= SCRIPT: RT1050_connect.scp =============

RT1050 Connect Script

DpID = 0BD11477

APID = 0x04770041

Disabling MPU

Configure FlexRAM for 256KB OC RAM, 128KB I-TCM, 128KB D-TCM

Finished

============= END SCRIPT =============================

Probe Firmware: CMSIS-DAP (ARM)

Serial Number: 0227000047784e45004b9003d7450050ddb1000097969900

VID:PID: 0D28:0204

USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#7&f42d7c9&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0 after searching for a good core

( 30) Emulator Connected

( 40) Debug Halt

( 50) CPU ID

debug interface type = CoreSight DP (DAP DP ID 0BD11477) over SWD TAP 0

processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core

ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CSt type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 Sys (type 0x0)

NXP: MIMXRT1052xxxxB

DAP stride is 1024 bytes (256 words)

Inspected v.2 External Flash Device on SPI MIMXRT1050-EVK_S26KS512S.cfx

Image 'MIMXRT1050-EVK_S26KS512S Dec 12 2023 17:22:54'

( 65) Chip Setup Complete

Connected: was_reset=false. was_stopped=true

( 70) License Check Complete

Opening flash driver MIMXRT1050-EVK_S26KS512S.cfx

Sending VECTRESET to run flash driver

Flash device supported (64MB = 256*256K at 0x60000000)

Mass Erase flash at 0x60000000

EraseChip (0x0, 0x0, 0x0) status 0x40 - driver reports init failure - EXTSPI driver rc -1 (0xFFFFFFFF)

complains because another operation was called after Init failed (status 0x40)

There was a problem after unexpected flash driver bahaviour was seen, so we are going to compare the flash driver code with the memory where it was loaded.

Note that, after driver initialization, some difference is normal in 'generic' drivers.

Driver from AXF file:

20001070: 1f78a400 00000000 00000000 ..x.........

Driver code in memory:

20001070: 23c34600 00008000 016e3600 .F.#.....6n.

Driver may be corrupt - halting target for post-mortem

Driver Addresses

Start: 20000000

Entry: 2000009D

End: 200010EC

Stack: 200020F0

Mailbox:2000A0F0

Driver Register State

R0: FFFFFFFF

R1: 00000849

R2: 00000002

R3: 00000100

R4: 2000A0F0

R5: FFFFFFFF

R6: 00000000

R7: 00000008

R8: 00000000

R9: 00000000

R10: 00000000

R11: 00000000

R12: 00000014

SP: 200020F0

LR: 20000A9F

PC: 200000B2

xPSR: 61000000

MSP: 200020F0

PSP: 200020F0

CFBP: 00000001 (CONTROL=0x0, FAULTMASK=0x0, BASEPRI=0x0, PRIMASK=0x1)

Stacked Exception information at MSP (not in exception now)

2000210C: xPSR: 00000000

20002108: VECTPC: 00000000

20002104: LR: 00000000

20002100: R12: 00000000

200020FC: R3: 03030303

200020F8: R2: 00000000

200020F4: R1: 56010400

200020F0: R0: 42464346

Exception registers

E000ED04: ICSR: 00000000

E000ED08: VTOR: 00200000 TBLBASE=0(INCODE), TBLOFF=0x4000

E000ED28: MMFSR: 00

E000ED29: BFSR: 00

E000ED2A: UFSR: 0000

E000ED2C: HFSR: 00000000

E000ED30: DFSR: 00000001 (HALTED)

E000ED3C: AFSR: 00000000

E000ED24: SHCSR: 00000000

E000ED34: MMAR: 00000000

E000ED38: BFAR: 00000000

E000EDFC: DEMCR: 01000000 (TRCENA)

Closing flash driver MIMXRT1050-EVK_S26KS512S.cfx

MassErase completed (in 315ms)