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    <title>topic Re: How to config RT1170 EVK to use on chip RAM only? in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803209#M28819</link>
    <description>&lt;P&gt;Thanks for explanation, Kerry&lt;/P&gt;&lt;P&gt;Do you see the same issue in debug mode following the procedure as you showed? the serial handle ends up in ITC memory location 0, and it hangs.&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;</description>
    <pubDate>Wed, 07 Feb 2024 08:03:40 GMT</pubDate>
    <dc:creator>ping1</dc:creator>
    <dc:date>2024-02-07T08:03:40Z</dc:date>
    <item>
      <title>How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1801960#M28790</link>
      <description>&lt;P&gt;Dear all&lt;/P&gt;&lt;P&gt;I am using EVK1170 and test with lwip_dhcp_freertos_cm7 example.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I noticed it use external RAM by default, and I would like to config the project use internal RAM only, as my target board won't have any external RAM. Please let me know the procedure for that.&lt;/P&gt;&lt;P&gt;I tried remove delete RAM and RAM2 only from the memory editor below? what else do I need to do please?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ping1_0-1707144065125.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261965iD56DD7D241F9254F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ping1_0-1707144065125.png" alt="ping1_0-1707144065125.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;</description>
      <pubDate>Mon, 05 Feb 2024 14:42:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1801960#M28790</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-05T14:42:43Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1801968#M28791</link>
      <description>&lt;P&gt;Just tried and got an error in compiling like below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ping1_0-1707144536098.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261969i745853E461615999/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ping1_0-1707144536098.png" alt="ping1_0-1707144536098.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Help is needed please.&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Feb 2024 14:49:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1801968#M28791</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-05T14:49:24Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1802363#M28797</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/64110"&gt;@ping1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; It's easy to realize it, please check the original project build result:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1707198241754.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262075iF2F6578C0F7AEB2A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1707198241754.png" alt="kerryzhou_0-1707198241754.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;We can see, the used SDRAM size is about 84KB, so, totally can put to the internal RAM.&lt;/P&gt;
&lt;P&gt;Then, you can change the memory setting like this:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_1-1707198314049.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262076iC6B08D7C78B371E4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_1-1707198314049.png" alt="kerryzhou_1-1707198314049.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_2-1707198391823.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262077iE74BBC294B165793/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_2-1707198391823.png" alt="kerryzhou_2-1707198391823.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Then the new build result is:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_3-1707198418567.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262078iAF3C096B266B9214/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_3-1707198418567.png" alt="kerryzhou_3-1707198418567.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;You can see, all the used data in the internal RAM now.&lt;/P&gt;
&lt;P&gt;You can try it on your side.&lt;/P&gt;
&lt;P&gt;BTW, you can remove&amp;nbsp;XIP_BOOT_HEADER_DCD_ENABLE define to avoid the SDRAM definition:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_4-1707199833160.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262080iD4E07C109562DEBB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_4-1707199833160.png" alt="kerryzhou_4-1707199833160.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;About your remove the SDRAM memory situation, it is mainly related to the board.c:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV style="background-color: #ffffff; padding: 0px 0px 0px 2px;"&gt;
&lt;DIV style="color: #000000; background-color: #ffffff; font-family: 'Consolas'; font-size: 10pt; white-space: pre;"&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;extern&lt;/SPAN&gt; &lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; __base_NCACHE_REGION;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;extern&lt;/SPAN&gt; &lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; __top_NCACHE_REGION;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt; &lt;SPAN&gt;nonCacheStart&lt;/SPAN&gt;&lt;SPAN&gt; = (&lt;/SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt;)(&amp;amp;__base_NCACHE_REGION);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; size = (&lt;/SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt;)(&amp;amp;__top_NCACHE_REGION) - &lt;/SPAN&gt;&lt;SPAN&gt;nonCacheStart&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;You can change the memory also to the ITCM or DTCM, then you will build without any issues.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;Wish it helps you!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0;"&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 06 Feb 2024 06:11:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1802363#M28797</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-06T06:11:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1802525#M28804</link>
      <description>&lt;P&gt;Dear Kerry&lt;/P&gt;&lt;P&gt;Thanks for reply, followed and found an issue with it, in Managed Linker Script section configure the NonCacheable.init and NonCacheable to SRAM_ITC_cm7 will cause a failure in fsl_component_serial_manager.c at line 1245 - assert(handle), handle is in ITC memory location 0 and it stays there forever. Change to DTC and works&lt;/P&gt;&lt;P&gt;I have been caution to use ITC memory for variables, it caused issue for me in past when use RT1024, here is another one. Although this one can be solved by change the remove the assert(). My question is can we use ITC like DTC ? is it used by CPU for other tasks?&lt;/P&gt;&lt;P&gt;Another question about the board.c definition for&amp;nbsp;&lt;SPAN&gt;nonCacheStart and size, look like we have to define a location for it? why?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 06 Feb 2024 09:13:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1802525#M28804</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-06T09:13:17Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803105#M28818</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/64110"&gt;@ping1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Thanks for your updated information.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;To the&amp;nbsp;&lt;SPAN&gt;variables, it's better to put in the DTCM, as it is data TCM.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; If you want to use the ITCM, I think, maybe also can define some special area in the ITCM from the TOP side, not the 0 addres, just dived the ITCM into two pieces, then define your used area in your own defined TCM area.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; To the nonCacheStart, normally it is used for the SDRAM which need to use the nonCache area, as some SDK demo need to put the data in the noncache area for the SDRAM, you also can see the original area is indicated to the SDRAM area. So, we need to change it to the internal RAM when you don't use the external SDRAM.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; You can try it on your side.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; If you still have question about it, please kindly let me know.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Feb 2024 03:40:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803105#M28818</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-07T03:40:28Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803209#M28819</link>
      <description>&lt;P&gt;Thanks for explanation, Kerry&lt;/P&gt;&lt;P&gt;Do you see the same issue in debug mode following the procedure as you showed? the serial handle ends up in ITC memory location 0, and it hangs.&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;</description>
      <pubDate>Wed, 07 Feb 2024 08:03:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803209#M28819</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-07T08:03:40Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803220#M28820</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/64110"&gt;@ping1&lt;/a&gt;&amp;nbsp;，&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; You are welcome.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Could you please also share one screenshot about&amp;nbsp;&lt;SPAN&gt;serial handle ends up in ITC memory location 0?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; Then, I will test it on my side.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;Now, you want to use the ITCM, and it have issues, right? So, you use the DTCM instead of it, right?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Feb 2024 08:24:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803220#M28820</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-07T08:24:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803230#M28821</link>
      <description>&lt;P&gt;Hi, Kerry&lt;/P&gt;&lt;P&gt;See the screen shot below, the Terminal window prints out Initializing PHY and then hangs at the location shown. If I change the both NonCacheable setting to SRAM_DTC_cm7 in Managed Linker Script , then no this issue, and it works fine, thanks.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ping1_0-1707294689376.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262299i66573E152AED46EF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ping1_0-1707294689376.png" alt="ping1_0-1707294689376.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;</description>
      <pubDate>Wed, 07 Feb 2024 08:37:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1803230#M28821</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-07T08:37:20Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1804124#M28845</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/64110"&gt;@ping1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; ITCM for&amp;nbsp;&lt;SPAN&gt;NonCacheable&amp;nbsp;setting also works on my side, please check my test result and the attached demo which I have written for you:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1707400663526.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262521i3C795BF8AC02036D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1707400663526.png" alt="kerryzhou_0-1707400663526.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_1-1707400671215.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262522i575BDE0481CBB73D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_1-1707400671215.png" alt="kerryzhou_1-1707400671215.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;This is my DHCP test result:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_2-1707400688423.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262523i0C2BC5AE2F7A8A6F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_2-1707400688423.png" alt="kerryzhou_2-1707400688423.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can test it on your MIMXRT1170-EVK board.&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;BTW, 2024 Chinese Spring Festival: Feb 9th to Feb 18th in total 10 days.&lt;BR /&gt;We will in the Spring Festival vacation, and back to work from 2.19th. During this time, you also can create the case, then our Mexico colleague will help you in your new case.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 08 Feb 2024 13:58:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1804124#M28845</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-08T13:58:59Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1804131#M28846</link>
      <description>&lt;P&gt;Hi, Kerry&lt;/P&gt;&lt;P&gt;Thanks for trying, I see it works now because you create another section of SRAM_ITC_cm7_usr, which is not located on the memory address 0 location of ITC, otherwise it won't work, I will trying to do same in future if I need to use ITC too.&lt;/P&gt;&lt;P&gt;Happy Chinese New Year!&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;P&gt;Ping&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 08 Feb 2024 14:08:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1804131#M28846</guid>
      <dc:creator>ping1</dc:creator>
      <dc:date>2024-02-08T14:08:43Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1810475#M28940</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/64110"&gt;@ping1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You are always welcome!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;If you don't divide the specific area for your usr data, it may influence the original project requred ITCM area, that's why I define&amp;nbsp;&lt;SPAN&gt;SRAM_ITC_cm7_usr.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; If you have any RT issues in the future, welcome to create the new question post to discuss it.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Feb 2024 02:40:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1810475#M28940</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-19T02:40:27Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1814519#M29008</link>
      <description>&lt;P&gt;Hi I am trying to run "evkbmimxrt1170_lvgl_demo_widgets_cm7" without SDRAM but facing problem. It is a UI application.&amp;nbsp;&lt;BR /&gt;My question is: Is it possible to run "evkbmimxrt1170_lvgl_demo_widgets_cm7" or any scalable GUI/UI application without external RAM.&amp;nbsp;&lt;BR /&gt;For above configuration I am getting following errors:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: evkbmimxrt1170_lvgl_demo_widgets_cm7.axf section `.bss_RAM2' will not fit in region `SRAM_ITC_cm7_user'&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: evkbmimxrt1170_lvgl_demo_widgets_cm7.axf section `.bss' will not fit in region `SRAM_ITC_cm7'&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: section .bss_RAM2 VMA [00030000,0023001f] overlaps section .bss VMA [00000440,003f5e57]&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: region `SRAM_ITC_cm7' overflowed by 3964504 bytes&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: region `SRAM_ITC_cm7_user' overflowed by 2031648 bytes&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;../com.nxp.mcuxpresso.tools.win32_11.9.0.202307121226/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/bin/ld.exe: ./board/board.o: in function `BOARD_ConfigMPU':&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Memory region Used Size Region Size %age Used&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOARD_FLASH: 575592 B 64 MB 0.86%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_ITC_cm7: 4161112 B 192 KB 2116.45%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_ITC_cm7_user: 2097184 B 64 KB 3200.05%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_DTC_cm7: 0 GB 256 KB 0.00%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_OC1: 0 GB 512 KB 0.00%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_OC2: 0 GB 512 KB 0.00%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_OC_ECC1: 0 GB 64 KB 0.00%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;SRAM_OC_ECC2: 0 GB 64 KB 0.00%&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;collect2.exe: error: ld returned 1 exit status&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;make[1]: *** [makefile:117: evkbmimxrt1170_lvgl_demo_widgets_cm7.axf] Error 1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;make: *** [makefile:108: all] Error 2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;"make -r -j4 all" terminated with exit code 2. Build might be incomplete.&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 23 Feb 2024 09:18:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1814519#M29008</guid>
      <dc:creator>mdkhaledibnhassan</dc:creator>
      <dc:date>2024-02-23T09:18:56Z</dc:date>
    </item>
    <item>
      <title>Re: How to config RT1170 EVK to use on chip RAM only?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1816071#M29045</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228609"&gt;@mdkhaledibnhassan&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you have any issues, please help to create your own question post, then we will help you in your own question post, don't just follow your question in the other customer's closed post, thanks a lot for your understanding.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Tue, 27 Feb 2024 02:36:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-config-RT1170-EVK-to-use-on-chip-RAM-only/m-p/1816071#M29045</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-02-27T02:36:39Z</dc:date>
    </item>
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