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    <title>i.MX RT Crossover MCUsのトピックIMXRT1176 MCU - programming external memory with Segger Jlink using Open Flash Loader</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1798503#M28717</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Some time ago I managed to create flash loader for&amp;nbsp;LPC-Link2 debug probe. It was created using Open Flash Loader Standard and it was used to download the code into the external memory (Infineon hyperflash S26HL512T) on a custom board with dual core IMXRT1176 MCU on it.&lt;/P&gt;&lt;P&gt;Recently I wanted to check out Segger's Jlink debugger, but I knew from the start, that it behaves differently than LPC-Link2 probe.&lt;BR /&gt;Generally I found out that it can handle 2 flash loaders:&lt;BR /&gt;1.) Open flash loader which has to be created according to some predefined rules in terms of memory sections in the flahs loader image.&lt;BR /&gt;&lt;SPAN&gt;2.) Segger Flash Loader which is supposedly much faster algorithm, but it requires from me to buy a dedicated tool for that,&amp;nbsp;J-Link Device Support Kit.&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Now, I know that I could probably use the existing flash loader I have, but it requires some modifications.&lt;BR /&gt;First of all, according to the Segger's wikipedia page, There MUST exist some particular memory sections within the flash loader image that is used.&lt;BR /&gt;The sections layout is shown on the picture below:&lt;BR /&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_0-1706690653377.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261002iE8258A538495ED04/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_0-1706690653377.png" alt="mimlo_0-1706690653377.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And here comes the problem, I know that embedded studio IDE manages its linker files in some unique way, meaning the use something like palcement.xml file that enforces some memory sections, like on the image below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_1-1706690814231.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261003i74B370394C1E7E72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_1-1706690814231.png" alt="mimlo_1-1706690814231.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I have my own linker script as you can see below, but I have problems with creating the required section layout.&lt;BR /&gt;LLinkerscript:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/*
 * Copyright 2022 NXP
 * SPDX-License-Identifier: BSD-3-Clause
 *
 * Linker script for NXP LPC546xx SPIFI Flash Driver (Messaged)
 */

__stack_size = 128;					/* stack size */
__cache_size = (16 * 1024);			/* flash image buffer size */

MEMORY
{
	  SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = (64 * 1024) - 32
}


__top_SRAM = 0x20000000 + (64 * 1024) - 32;


GROUP(libcr_semihost.a libcr_c.a libcr_eabihelpers.a)


SEARCH_DIR(..)

ENTRY(ResetISR)

SECTIONS
{
/* Marks the start of the SFL. Must be the very first section */
    PrgCode : ALIGN(4)
    {
        KEEP(*(PrgCode))
    } &amp;gt; SRAM

	/* MAIN TEXT SECTION */
	.text : ALIGN(4)
	{
		FILL(0xff)
		KEEP(*(.isr_vector))

		/* Global Section Table */
		__section_table_start = .;
		__data_section_table = .;
		LONG(LOADADDR(.data));
		LONG(    ADDR(.data)) ;
		LONG(  SIZEOF(.data));
		__data_section_table_end = .;
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	 * for exception handling/unwind - some Newlib functions (in common
	 * with C++ and STDC++) use this.
	 */
	.ARM.extab : ALIGN(4)
	{
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} &amp;gt; SRAM
	__exidx_start = .;
	
	.ARM.exidx : ALIGN(4)
	{
		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
	} &amp;gt; SRAM
	__exidx_end = .;

	_etext = .;
	
    /* PrgData section */
    PrgData : ALIGN(4)
    {
        KEEP(*(PrgData))
        *(PrgData)
    } &amp;gt; SRAM


	/* MAIN DATA SECTION */

	.uninit_RESERVED : ALIGN(4)
	{
		KEEP(*(.bss.$RESERVED*))
	} &amp;gt; SRAM

	.data : ALIGN(4)
	{
		FILL(0xff)
		_data = .;
		*(vtable)
		*(.data*)
		. = ALIGN(4) ;
		_edata = .;
	} &amp;gt; SRAM


	/* MAIN BSS SECTION */
	.bss : ALIGN(4)
	{
		_bss = .;
		*(.bss*)
		*(COMMON)
		. = ALIGN(4) ;
		_ebss = .;
		PROVIDE(end = .);
	} &amp;gt; SRAM
	

    /* DevDscr section */
    DevDscr : ALIGN(4)
    {
        KEEP(*(DevDscr))
        *(DevDscr)
    } &amp;gt; SRAM

	PROVIDE(_pvHeapStart = .);
	PROVIDE(_vStackTop = __top_SRAM - 0);
}&lt;/LI-CODE&gt;&lt;P&gt;When I analize the output file I get the following section header tables:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_2-1706691181841.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261004iAD33B7A760BD0F16/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_2-1706691181841.png" alt="mimlo_2-1706691181841.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;My question is as follows.&lt;BR /&gt;&lt;STRONG&gt;How can I make sure that the linker script used by MCUXpresso places the sections as defined above in the memory map of the output image?&lt;/STRONG&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 31 Jan 2024 08:54:10 GMT</pubDate>
    <dc:creator>mimlo</dc:creator>
    <dc:date>2024-01-31T08:54:10Z</dc:date>
    <item>
      <title>IMXRT1176 MCU - programming external memory with Segger Jlink using Open Flash Loader</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1798503#M28717</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Some time ago I managed to create flash loader for&amp;nbsp;LPC-Link2 debug probe. It was created using Open Flash Loader Standard and it was used to download the code into the external memory (Infineon hyperflash S26HL512T) on a custom board with dual core IMXRT1176 MCU on it.&lt;/P&gt;&lt;P&gt;Recently I wanted to check out Segger's Jlink debugger, but I knew from the start, that it behaves differently than LPC-Link2 probe.&lt;BR /&gt;Generally I found out that it can handle 2 flash loaders:&lt;BR /&gt;1.) Open flash loader which has to be created according to some predefined rules in terms of memory sections in the flahs loader image.&lt;BR /&gt;&lt;SPAN&gt;2.) Segger Flash Loader which is supposedly much faster algorithm, but it requires from me to buy a dedicated tool for that,&amp;nbsp;J-Link Device Support Kit.&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Now, I know that I could probably use the existing flash loader I have, but it requires some modifications.&lt;BR /&gt;First of all, according to the Segger's wikipedia page, There MUST exist some particular memory sections within the flash loader image that is used.&lt;BR /&gt;The sections layout is shown on the picture below:&lt;BR /&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_0-1706690653377.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261002iE8258A538495ED04/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_0-1706690653377.png" alt="mimlo_0-1706690653377.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And here comes the problem, I know that embedded studio IDE manages its linker files in some unique way, meaning the use something like palcement.xml file that enforces some memory sections, like on the image below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_1-1706690814231.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261003i74B370394C1E7E72/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_1-1706690814231.png" alt="mimlo_1-1706690814231.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I have my own linker script as you can see below, but I have problems with creating the required section layout.&lt;BR /&gt;LLinkerscript:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/*
 * Copyright 2022 NXP
 * SPDX-License-Identifier: BSD-3-Clause
 *
 * Linker script for NXP LPC546xx SPIFI Flash Driver (Messaged)
 */

__stack_size = 128;					/* stack size */
__cache_size = (16 * 1024);			/* flash image buffer size */

MEMORY
{
	  SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = (64 * 1024) - 32
}


__top_SRAM = 0x20000000 + (64 * 1024) - 32;


GROUP(libcr_semihost.a libcr_c.a libcr_eabihelpers.a)


SEARCH_DIR(..)

ENTRY(ResetISR)

SECTIONS
{
/* Marks the start of the SFL. Must be the very first section */
    PrgCode : ALIGN(4)
    {
        KEEP(*(PrgCode))
    } &amp;gt; SRAM

	/* MAIN TEXT SECTION */
	.text : ALIGN(4)
	{
		FILL(0xff)
		KEEP(*(.isr_vector))

		/* Global Section Table */
		__section_table_start = .;
		__data_section_table = .;
		LONG(LOADADDR(.data));
		LONG(    ADDR(.data)) ;
		LONG(  SIZEOF(.data));
		__data_section_table_end = .;
		__bss_section_table = .;
		LONG(    ADDR(.bss));
		LONG(  SIZEOF(.bss));
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		__section_table_end = . ;
		/* End of Global Section Table */


		*(.after_vectors*)

		*(.text*)
		*(.rodata .rodata.*)
		. = ALIGN(4);

	} &amp;gt; SRAM	


	/*
	 * for exception handling/unwind - some Newlib functions (in common
	 * with C++ and STDC++) use this.
	 */
	.ARM.extab : ALIGN(4)
	{
		*(.ARM.extab* .gnu.linkonce.armextab.*)
	} &amp;gt; SRAM
	__exidx_start = .;
	
	.ARM.exidx : ALIGN(4)
	{
		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
	} &amp;gt; SRAM
	__exidx_end = .;

	_etext = .;
	
    /* PrgData section */
    PrgData : ALIGN(4)
    {
        KEEP(*(PrgData))
        *(PrgData)
    } &amp;gt; SRAM


	/* MAIN DATA SECTION */

	.uninit_RESERVED : ALIGN(4)
	{
		KEEP(*(.bss.$RESERVED*))
	} &amp;gt; SRAM

	.data : ALIGN(4)
	{
		FILL(0xff)
		_data = .;
		*(vtable)
		*(.data*)
		. = ALIGN(4) ;
		_edata = .;
	} &amp;gt; SRAM


	/* MAIN BSS SECTION */
	.bss : ALIGN(4)
	{
		_bss = .;
		*(.bss*)
		*(COMMON)
		. = ALIGN(4) ;
		_ebss = .;
		PROVIDE(end = .);
	} &amp;gt; SRAM
	

    /* DevDscr section */
    DevDscr : ALIGN(4)
    {
        KEEP(*(DevDscr))
        *(DevDscr)
    } &amp;gt; SRAM

	PROVIDE(_pvHeapStart = .);
	PROVIDE(_vStackTop = __top_SRAM - 0);
}&lt;/LI-CODE&gt;&lt;P&gt;When I analize the output file I get the following section header tables:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mimlo_2-1706691181841.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/261004iAD33B7A760BD0F16/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mimlo_2-1706691181841.png" alt="mimlo_2-1706691181841.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;My question is as follows.&lt;BR /&gt;&lt;STRONG&gt;How can I make sure that the linker script used by MCUXpresso places the sections as defined above in the memory map of the output image?&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 31 Jan 2024 08:54:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1798503#M28717</guid>
      <dc:creator>mimlo</dc:creator>
      <dc:date>2024-01-31T08:54:10Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1176 MCU - programming external memory with Segger Jlink using Open Flash Loader</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1806703#M28895</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP support.&lt;/P&gt;
&lt;P&gt;I understand that you are working on your own linker script and you will like to make sure MCUXpresso is using this memory placements. In this case I will recommend the&lt;A title=" MCUXpresso User Guide" href="https://www.nxp.com/webapp/Download?colCode=MCUXPRESSO-UG" target="_blank" rel="noopener"&gt; MCUXpresso User Guide&lt;/A&gt; in the chapter 20 you will find the memory and liker scripts information and configuration.&lt;/P&gt;
&lt;P&gt;Please let me know if there is anything else where I can help you.&lt;/P&gt;</description>
      <pubDate>Wed, 14 Feb 2024 17:50:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1806703#M28895</guid>
      <dc:creator>nxf77486</dc:creator>
      <dc:date>2024-02-14T17:50:09Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1176 MCU - programming external memory with Segger Jlink using Open Flash Loader</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1808860#M28907</link>
      <description>&lt;P&gt;Yes, I'm using my own which is based on the MCUXpresso's one. Unfortunately, MCUXpresso does not seem to support generation of OFL like linker script requirements.&lt;BR /&gt;I will take a look into the documentation, thanks.&lt;/P&gt;</description>
      <pubDate>Thu, 15 Feb 2024 05:17:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1176-MCU-programming-external-memory-with-Segger-Jlink/m-p/1808860#M28907</guid>
      <dc:creator>mimlo</dc:creator>
      <dc:date>2024-02-15T05:17:31Z</dc:date>
    </item>
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