i.MX RT Crossover MCUsのトピックRe: PWM using Flexio_PWM

PWM using Flexio_PWM

ManikantaRobbi — Thu, 25 Jan 2024 10:03:38 GMT

Hi,

I am trying to generate a PWM signal with Frequency=20Hz and DC=14%.I imported the flexio_pwm example from SDK which uses generates PWM at frequency=47MHz using kCLOCK_Root_Flexio2, i.e. 24Mhz.

But my application requires very low frequency <100Hz, when I try to change in Clock Configuration tool, it is showing error:

and also I tried setting to 100kHz, now clock configuration updated fine but in my source code,

there is a calculation of sum, lower & upper values which set the timer compare. when I'm using 100kHz as clock frequency, I'm getting value more than uint32_t.

Is there any other provision to use clock configuration or other method to figure out the issue.

Thanks & regards,

Manikanta Robbi.

Re: PWM using Flexio_PWM

_Leo_ — Tue, 30 Jan 2024 00:04:27 GMT

Hi,

Thank you so much for your interest in our products and for using our community.

You need to change the SOC domain voltage set point.

Hope it helps you.

Have a nice day!

Re: PWM using Flexio_PWM

ManikantaRobbi — Tue, 30 Jan 2024 05:13:54 GMT

Thanks @_Leo_ ,

For the information, I had tried changing SOC Domain Voltage Set Point, but not able to set 100KHz for FlexIO2 Clock root. Can you please guide steps to change and provide Application note or Reference manual.

Thanks & Regards,

Manikanta Robbi.

Re: PWM using Flexio_PWM

ManikantaRobbi — Tue, 30 Jan 2024 09:55:20 GMT

Hi,

As per guidance, I changed SOC Domain voltage point: Normal. And changed so configurations like

1)creating new functional group.

2)Enabling SYS_PLL_DIV5_CLK.

But the problem arises, when flashing code to MCU (resetting) or Not able to enter into Debug mode, Why? Is there any effect changing clock from 48Mhz to any PLL (ARM, or any similar options mention in the clock tree) may impact code flashing into memory.

Thanks & Regards,

Manikanta Robbi.

Re: PWM using Flexio_PWM

ManikantaRobbi — Tue, 30 Jan 2024 11:53:33 GMT

Hi @_Leo_ ,

I had found that clock is changing fine when we select: 48MHZ RC OSC

But the issue, when I configure with:SYS_PLL1_DIV5(making as active)

Note: this SYS_PLL is chosen from: External 24MHz Crystal

Why I'm not able to get frequency configured using PLL (by opting OSC_24MHz).

Thanks,

Manikanta Robbi.