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    <title>topic Re: About the 125 MHz (BOARD_BootClockRUN) real frequency in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1782234#M28271</link>
    <description>&lt;P&gt;Hi Kerry,&lt;/P&gt;&lt;P&gt;I configured the SAI clock in this way:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Source: IPG_CLK_ROOT - BOARD_BootClockRUN: 125 MHz, BOARD_BootClockRUN_400M: 99 MHz&lt;/P&gt;&lt;P&gt;Source Frequency:&amp;nbsp;125 MHz (BOARD_BootClockRUN)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is what I see in the perpherals.h:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;/***********************************************************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Definitions&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;**********************************************************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definitions for BOARD_InitPeripherals functional group */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_0_IRQN DMA0_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_0_IRQHANDLER DMA0_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_1_IRQN DMA1_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_1_IRQHANDLER DMA1_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_PERIPHERAL SAI1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* SAI1 interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_IRQN SAI1_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* SAI1 interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_IRQHANDLER SAI1_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Bit clock source frequency used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_BCLK_SOURCE_CLOCK_HZ 125000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Bit clock source frequency used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_BCLK_SOURCE_CLOCK_HZ 125000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Sample rate used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_SAMPLE_RATE 48000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Sample rate used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_SAMPLE_RATE 48000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Word width used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_WORD_WIDTH 32U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Word width used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_WORD_WIDTH 32U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Number of words within frame used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_WORDS_PER_FRAME 2U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Number of words within frame used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_WORDS_PER_FRAME 2U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* BOARD_InitPeripherals defines for LPSPI1 */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPSPI1_PERIPHERAL LPSPI1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPSPI1_CLOCK_FREQ 105600000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* BOARD_InitPeripherals defines for LPI2C1 */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_PERIPHERAL LPI2C1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_CLOCK_FREQ 60000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Transfer buffer size */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_MASTER_BUFFER_SIZE 1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of slave address */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_MASTER_SLAVE_ADDRESS 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;Luigi&lt;/P&gt;</description>
    <pubDate>Wed, 03 Jan 2024 10:08:02 GMT</pubDate>
    <dc:creator>LuigiV</dc:creator>
    <dc:date>2024-01-03T10:08:02Z</dc:date>
    <item>
      <title>About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1781679#M28247</link>
      <description>&lt;P&gt;I'm using the SAI to interface a Codec, I programmed 32bit, 48000Hz,...instead of a bclk frequency of 3.072MHz I get a 3.125MHz frequency...it seems that the board clock was 127MHz; I choose&amp;nbsp; the "source frequency" =&amp;nbsp;125 MHz (BOARD_BootClockRUN).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What is wrong ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Luigi&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jan 2024 10:57:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1781679#M28247</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-02T10:57:28Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1781941#M28258</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Normally, this is related to your clock configuration.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;You can test your&amp;nbsp;&lt;SPAN&gt;BOARD_BootClockRUN, whether your used freq is really 125Mhz in the code.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;I think, it is related to your clock source issues, you need to make sure the clock source is correct.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; If you still have issues about it, please tell me what the RT chip and board you are using.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jan 2024 03:26:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1781941#M28258</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-03T03:26:07Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1782234#M28271</link>
      <description>&lt;P&gt;Hi Kerry,&lt;/P&gt;&lt;P&gt;I configured the SAI clock in this way:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Source: IPG_CLK_ROOT - BOARD_BootClockRUN: 125 MHz, BOARD_BootClockRUN_400M: 99 MHz&lt;/P&gt;&lt;P&gt;Source Frequency:&amp;nbsp;125 MHz (BOARD_BootClockRUN)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is what I see in the perpherals.h:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;/***********************************************************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Definitions&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;**********************************************************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definitions for BOARD_InitPeripherals functional group */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_0_IRQN DMA0_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_0_IRQHANDLER DMA0_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_1_IRQN DMA1_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* NVIC interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; INT_1_IRQHANDLER DMA1_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_PERIPHERAL SAI1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* SAI1 interrupt vector ID (number). */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_IRQN SAI1_IRQn&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* SAI1 interrupt handler identifier. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_IRQHANDLER SAI1_IRQHandler&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Bit clock source frequency used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_BCLK_SOURCE_CLOCK_HZ 125000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Bit clock source frequency used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_BCLK_SOURCE_CLOCK_HZ 125000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Sample rate used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_SAMPLE_RATE 48000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Sample rate used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_SAMPLE_RATE 48000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Word width used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_WORD_WIDTH 32U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Word width used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_WORD_WIDTH 32U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Number of words within frame used for calculating the bit clock divider in the TxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_TX_WORDS_PER_FRAME 2U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Number of words within frame used for calculating the bit clock divider in the RxSetBitClockRate function. */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SAI1_RX_WORDS_PER_FRAME 2U&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* BOARD_InitPeripherals defines for LPSPI1 */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPSPI1_PERIPHERAL LPSPI1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPSPI1_CLOCK_FREQ 105600000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* BOARD_InitPeripherals defines for LPI2C1 */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of peripheral ID */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_PERIPHERAL LPI2C1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_CLOCK_FREQ 60000000UL&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Transfer buffer size */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_MASTER_BUFFER_SIZE 1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Definition of slave address */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; LPI2C1_MASTER_SLAVE_ADDRESS 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;Luigi&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jan 2024 10:08:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1782234#M28271</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-03T10:08:02Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1782606#M28288</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Don't just check the define.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You can use this related code to get your clock source, and printf it out, give you an example:&lt;/P&gt;
&lt;P&gt;#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (EXAMPLE_LPSPI_CLOCK_SOURCE_DIVIDER + 1U))&lt;/P&gt;
&lt;P&gt;&lt;BR clear="none" /&gt;Let's test it with code:&lt;BR clear="none" /&gt;&amp;nbsp; &amp;nbsp; freq_main = LPSPI_MASTER_CLK_FREQ;&lt;BR clear="none" /&gt;&amp;nbsp; &amp;nbsp; PRINTF("\r\nfreq_main= %d\r\n", freq_main);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I mean, you can use the&amp;nbsp;CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk)&amp;nbsp; to get your clock source, then printf it.&lt;/P&gt;
&lt;P&gt;Whether it is the same as your define.&lt;/P&gt;
&lt;P&gt;If you still have issues about it.&lt;/P&gt;
&lt;P&gt;You can reproduce it in the NXP EVK board, and let me know your used SDK demo, I will help you to check it on my side.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Thu, 04 Jan 2024 02:47:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1782606#M28288</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-04T02:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1784482#M28362</link>
      <description>Thanks Kerry, I inserted your code and I get 60MHz...something is wrong, the bit clock is 3.125MHz instead of 3.072MHz starting by a 125MHz main clock, just a little bit higher...It's not possible that it uses a 60MHz...&lt;BR /&gt;Question: why do you start from the CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) to check the SAI clock ?&lt;BR /&gt;&lt;BR /&gt;Luigi</description>
      <pubDate>Mon, 08 Jan 2024 14:07:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1784482#M28362</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-08T14:07:10Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785155#M28383</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; What's the board you are using? I mean, which RT series you are using?&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Then, I will tell you how to check the SAI clock source.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you are using the MCUXpresso IDE, you can use the CFG tool to check it.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1704793467817.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/257264iC1A108E7D6748242/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1704793467817.png" alt="kerryzhou_0-1704793467817.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Make sure the clock source freq is correct.&lt;/P&gt;
&lt;P&gt;BTW, I have a document for you:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT10xx-SAI-basic-and-SDCard-wave-file-play/ta-p/1259608" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT10xx-SAI-basic-and-SDCard-wave-file-play/ta-p/1259608&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You can refer to the basic.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Jan 2024 09:45:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785155#M28383</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-09T09:45:50Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785292#M28387</link>
      <description>&lt;P&gt;Hi Kerry,&lt;/P&gt;&lt;P&gt;thanks for your support...looking your images I verify the clock frequency; it is 125MHz, but this value can't give me the correct bit clock value of 3.072MHz.&lt;/P&gt;&lt;P&gt;Indeed if I divide the 125MHz by 40, the result is just 3.125MHz for the bit clock and 48.828Khz for the frame clock (these values are what I measure); what I would need is to change the 125MHz to get the right values (as right as possible) for the bit and frame clocks.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Luigi&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Jan 2024 13:32:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785292#M28387</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-09T13:32:35Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785644#M28398</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You want to get: 2ch,&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;32bit, 48000Hz, right?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;Please tell me the RT board and chip you are using, then I will help you generate one correct SAI clock to you.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT color="#FF0000"&gt;&lt;STRONG&gt;&amp;nbsp;Again: Tell me your used RT chip partnumber!!!&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;FONT color="#000000"&gt;Best Regards,&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT color="#000000"&gt;kerry&lt;/FONT&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 10 Jan 2024 02:35:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785644#M28398</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-10T02:35:13Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785913#M28403</link>
      <description>Hi Kerry,&lt;BR /&gt;I'm using the IMXRT1010 EVK.&lt;BR /&gt;&lt;BR /&gt;Thank you, Luigi</description>
      <pubDate>Wed, 10 Jan 2024 08:55:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1785913#M28403</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-10T08:55:13Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787058#M28422</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; To this situation, you need to configure the PLL to match your situation.&lt;/P&gt;
&lt;P&gt;Eg. you can configure the master clock to : 6.144Mhz.&lt;/P&gt;
&lt;P&gt;Then, even it is divided 2, you can get 3.072Mhz&lt;/P&gt;
&lt;P&gt;This is the CFG situation with PLL4:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1704964222846.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/257724iA21CBD16C4870944/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1704964222846.png" alt="kerryzhou_0-1704964222846.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_1-1704964264032.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/257725i0BA086F265CA43E1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_1-1704964264032.png" alt="kerryzhou_1-1704964264032.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;You can check my attached project, mainly the clock_configure.c is used to select the PLL4.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Jan 2024 09:12:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787058#M28422</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-11T09:12:24Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787095#M28425</link>
      <description>Thank you Kerry !!</description>
      <pubDate>Thu, 11 Jan 2024 09:48:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787095#M28425</guid>
      <dc:creator>LuigiV</dc:creator>
      <dc:date>2024-01-11T09:48:32Z</dc:date>
    </item>
    <item>
      <title>Re: About the 125 MHz (BOARD_BootClockRUN) real frequency</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787637#M28435</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225874"&gt;@LuigiV&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You are always welcome!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you still have question about this case, just kindly let me know.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If your question is solved, please help to mark the correct answer, just to close this case.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Any new issues, welcome to create the new case or community question post.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jan 2024 02:41:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/About-the-125-MHz-BOARD-BootClockRUN-real-frequency/m-p/1787637#M28435</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-12T02:41:05Z</dc:date>
    </item>
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