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    <title>topic 回复： Application of NIC-301 in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Application-of-NIC-301/m-p/1773684#M27985</link>
    <description>&lt;P&gt;NIC301 is a hardware mechanism used to implement Network-on-Chip (NoC) that connects different master devices (e.g., processor cores, DMA controllers, peripherals, etc.) and slave devices (e.g., memory, peripherals, etc.) to achieve efficient sharing and access to system resources. ), thus realizing efficient sharing and accessing of system resources.&lt;/P&gt;
&lt;P&gt;The CoreLink Network Interconnect is a highly configurable component that enables you to create a complete high performance, optimized AMBA-compliant network infrastructure. The possible configurations for the CoreLink Network Interconnect can range from a single bridge component, for example an AHB to AXI protocol bridge, to a complex infrastructure that consists of up to 128 masters and 64 slaves of a combination of different AMBA protocols.&lt;/P&gt;
&lt;P&gt;A CoreLink Network Interconnect configuration can consist of multiple switches with many topology options.&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CoreLink Network Interconnect contains:&lt;/P&gt;
&lt;DIV&gt;
&lt;DIV&gt;
&lt;UL&gt;
&lt;LI&gt;
&lt;P&gt;multiple switches&lt;/P&gt;
&lt;/LI&gt;
&lt;LI&gt;
&lt;P&gt;multiple&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;AMBA Slave Interface Blocks&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(ASIBs)&lt;/P&gt;
&lt;/LI&gt;
&lt;LI&gt;
&lt;P&gt;multiple&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;AMBA Master Interface Blocks&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(AMIBs).&lt;/P&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;SPAN&gt;CoreLink Network Interconnect NIC-301 Technical Reference Manual:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;A href="https://developer.arm.com/documentation/ddi0397/i/" target="_blank" rel="nofollow noopener noreferrer"&gt;https://developer.arm.com/documentation/ddi0397/i/&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;BR /&gt;Gavin&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
    <pubDate>Wed, 13 Dec 2023 07:38:41 GMT</pubDate>
    <dc:creator>Gavin_Jia</dc:creator>
    <dc:date>2023-12-13T07:38:41Z</dc:date>
    <item>
      <title>Application of NIC-301</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Application-of-NIC-301/m-p/1771320#M27920</link>
      <description>&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&amp;nbsp; In I.MXRT1176 there is a peripheral name Network Interconnect Subsystem(NIC301)&lt;/P&gt;&lt;P&gt;1.Could you please explain, what is the use of this peripheral?&lt;/P&gt;&lt;P&gt;2. How can it be used in a application?&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Fri, 08 Dec 2023 05:33:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Application-of-NIC-301/m-p/1771320#M27920</guid>
      <dc:creator>Newton829</dc:creator>
      <dc:date>2023-12-08T05:33:50Z</dc:date>
    </item>
    <item>
      <title>回复： Application of NIC-301</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Application-of-NIC-301/m-p/1773684#M27985</link>
      <description>&lt;P&gt;NIC301 is a hardware mechanism used to implement Network-on-Chip (NoC) that connects different master devices (e.g., processor cores, DMA controllers, peripherals, etc.) and slave devices (e.g., memory, peripherals, etc.) to achieve efficient sharing and access to system resources. ), thus realizing efficient sharing and accessing of system resources.&lt;/P&gt;
&lt;P&gt;The CoreLink Network Interconnect is a highly configurable component that enables you to create a complete high performance, optimized AMBA-compliant network infrastructure. The possible configurations for the CoreLink Network Interconnect can range from a single bridge component, for example an AHB to AXI protocol bridge, to a complex infrastructure that consists of up to 128 masters and 64 slaves of a combination of different AMBA protocols.&lt;/P&gt;
&lt;P&gt;A CoreLink Network Interconnect configuration can consist of multiple switches with many topology options.&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;CoreLink Network Interconnect contains:&lt;/P&gt;
&lt;DIV&gt;
&lt;DIV&gt;
&lt;UL&gt;
&lt;LI&gt;
&lt;P&gt;multiple switches&lt;/P&gt;
&lt;/LI&gt;
&lt;LI&gt;
&lt;P&gt;multiple&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;AMBA Slave Interface Blocks&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(ASIBs)&lt;/P&gt;
&lt;/LI&gt;
&lt;LI&gt;
&lt;P&gt;multiple&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;AMBA Master Interface Blocks&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(AMIBs).&lt;/P&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;SPAN&gt;CoreLink Network Interconnect NIC-301 Technical Reference Manual:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;A href="https://developer.arm.com/documentation/ddi0397/i/" target="_blank" rel="nofollow noopener noreferrer"&gt;https://developer.arm.com/documentation/ddi0397/i/&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;BR /&gt;Gavin&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Wed, 13 Dec 2023 07:38:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Application-of-NIC-301/m-p/1773684#M27985</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2023-12-13T07:38:41Z</dc:date>
    </item>
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