i.MX RT Crossover MCUsのトピックRe: iMXRT1064 Emwin with Internal RAM LCD frame buffer

iMXRT1064 Emwin with Internal RAM LCD frame buffer

anujtanksali — Wed, 10 Apr 2019 11:14:30 GMT

Hello,

The iMXRT 1064 emwin demo code uses the external SDRAM for LCD frame buffer. I was able to configure the internal ram for LCD frame buffer in linker settings (see attached file). I select SRAM_OC instead of BOARD_SDRAM_NONCACHEABLE for .data and .bss sections the code is running fine on my 1064 EVK board.

When i configure the Emwin code to use 1 LCD buffer instead of 2 (#define GUI_BUFFERS 1) my screen is not displayed correctly. I see the text displayed but with a lot of garbage on the screen. When i use 2 buffers (#define GUI_BUFFERS 2) for LCD buffer the screen displays fine.

If i use external SDRAM for LCD frame buffer with GUI_BUFFERS as 1 then it displays fine but not with internal RAM.

what could be the issue here.

Regards,

Anuj

Re: iMXRT1064 Emwin with Internal RAM LCD frame buffer

victorjimenez — Mon, 15 Apr 2019 23:38:22 GMT

Hello Anuj,

Inside the main of the example, the first thing it does is call the function BOARD_ConfigMPU(); Inside this function, in the end, you enable the I and D cache with these two functions: SCB_EnableDCache and SCB_EnableICache. Please comment these two calls to functions and add these two instead: SCB_DisableDCache and SCB_DisableICache. At the end you will have something like the following:

Once you make these changes the demo should work from SRAM_OC with only one GUI_BUFFER.

Have a great day,
TIC

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Re: iMXRT1064 Emwin with Internal RAM LCD frame buffer

anujtanksali — Tue, 16 Apr 2019 09:29:05 GMT

Hello Victor,

Thanks. it is working fine now with internal RAM and GUI_BUFFERS as 1.

can you please tell me why this change is needed?

Regards,

Anuj

Re: iMXRT1064 Emwin with Internal RAM LCD frame buffer

victorjimenez — Tue, 16 Apr 2019 17:50:04 GMT

Hello Anuj,

I´m glad to hear that it's working fine now!

When they made the example for the RT, they use as a based the one from the LPC54628. The LPC doesn't have cache memory, so they didn't take into consideration this in the implementation of the RT.

You were using the cache memory by default but you were not making any flash to it, this was causing the problems that you were facing.

Best regards,

Victor.