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    <title>topic Re: UB/LB diagram on RT117x for SRAM operations in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1722824#M26816</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/222930"&gt;@Pierre_Caz&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; I also report internally.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Our expert said, they will add the UB/LB wave to the new RM version in the future.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Current, just use my attached picture in the above, that is from the design team.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
    <pubDate>Thu, 14 Sep 2023 06:51:19 GMT</pubDate>
    <dc:creator>kerryzhou</dc:creator>
    <dc:date>2023-09-14T06:51:19Z</dc:date>
    <item>
      <title>UB/LB diagram on RT117x for SRAM operations</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1721996#M26789</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are using a RT117x with SRAM and we have some troubles with timings.&lt;/P&gt;&lt;P&gt;On the Reference manual we cannot find a diagram for SRAM in ASYNC mode non ADMUX that contains LB/UB signals.&lt;/P&gt;&lt;P&gt;This Question shows a diagram that is not found in the RT1170 manual.&lt;/P&gt;&lt;P&gt;&lt;LI-MESSAGE title="About UB/LB Signals behavior when SEMC is used as SRAM-I/F" uid="1340745" url="https://community.nxp.com/t5/i-MX-RT/About-UB-LB-Signals-behavior-when-SEMC-is-used-as-SRAM-I-F/m-p/1340745#U1340745" discussion_style_icon_css="lia-mention-container-editor-message lia-img-icon-forum-thread lia-fa-icon lia-fa-forum lia-fa-thread lia-fa"&gt;&lt;/LI-MESSAGE&gt;&lt;/P&gt;&lt;P&gt;Where could I find such a diagram ?&lt;/P&gt;&lt;P&gt;Thank you&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Sep 2023 11:11:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1721996#M26789</guid>
      <dc:creator>Pierre_Caz</dc:creator>
      <dc:date>2023-09-13T11:11:25Z</dc:date>
    </item>
    <item>
      <title>Re: UB/LB diagram on RT117x for SRAM operations</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1722719#M26805</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/222930"&gt;@Pierre_Caz&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; I checked some internal information, the UB/LB diagram didn't added to the RM, the picture:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1694666557677.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/240927i96362EBD8FF60BB9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1694666557677.png" alt="kerryzhou_0-1694666557677.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Is from the internal side, you can refer to it directly, as it is shared from our internal expert, I think it is from the R&amp;amp;D side, just didn't show in the RM.&lt;/P&gt;
&lt;P&gt;You can consider it is from the internal material which is not shared with the customer, thanks.&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;If you still have question about it, please kindly let me know.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Sep 2023 04:44:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1722719#M26805</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2023-09-14T04:44:05Z</dc:date>
    </item>
    <item>
      <title>Re: UB/LB diagram on RT117x for SRAM operations</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1722824#M26816</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/222930"&gt;@Pierre_Caz&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; I also report internally.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Our expert said, they will add the UB/LB wave to the new RM version in the future.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Current, just use my attached picture in the above, that is from the design team.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Thu, 14 Sep 2023 06:51:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/UB-LB-diagram-on-RT117x-for-SRAM-operations/m-p/1722824#M26816</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2023-09-14T06:51:19Z</dc:date>
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