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    <title>i.MX RT Crossover MCUsのトピックRe: LCDIF and Internal RAM</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883516#M2548</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;You are welcome.&lt;SPAN style="color: #000000; font-family: Times New Roman; font-size: medium;"&gt; &lt;SPAN style="color: #000000; font-size: medium; font-family: Times New Roman;"&gt;Usually the memory cache of the video frame buffer is disabled. And for the detail information,you can refer to the configuration of the last memory region that the board.c of any example of the SDK.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 21 Jan 2019 03:13:44 GMT</pubDate>
    <dc:creator>fangfang</dc:creator>
    <dc:date>2019-01-21T03:13:44Z</dc:date>
    <item>
      <title>LCDIF and Internal RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883513#M2545</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I intend to use mxrt1062 microprocessor with about 1 Megabyte of internal RAM.&amp;nbsp; I'd like to put frame buffer in internal RAM ( no SDRAM). Is it possible? How about cache setting for internal RAM?&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Giovanni Grondona&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Jan 2019 20:50:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883513#M2545</guid>
      <dc:creator>giannigrondona</dc:creator>
      <dc:date>2019-01-17T20:50:41Z</dc:date>
    </item>
    <item>
      <title>Re: LCDIF and Internal RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883514#M2546</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Yes, it is possibe. Please refer to the reference manual &lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM" title="https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM"&gt;https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM&lt;/A&gt;&amp;nbsp;&lt;A class="unlinked"&gt;.&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Hope it help you.Have a nice day.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Jan 2019 07:00:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883514#M2546</guid>
      <dc:creator>fangfang</dc:creator>
      <dc:date>2019-01-18T07:00:35Z</dc:date>
    </item>
    <item>
      <title>Re: LCDIF and Internal RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883515#M2547</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Thank you for your answer. I am going to&amp;nbsp; use OCRAM per video Buffer. I think I have to set cache policy for OCRAM in this manner:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;CACHE ENABLED&lt;/LI&gt;&lt;LI&gt;&amp;nbsp; WRITE THROUGH&amp;nbsp;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Is it correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Giovanni&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Jan 2019 11:43:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883515#M2547</guid>
      <dc:creator>giannigrondona</dc:creator>
      <dc:date>2019-01-18T11:43:33Z</dc:date>
    </item>
    <item>
      <title>Re: LCDIF and Internal RAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883516#M2548</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;You are welcome.&lt;SPAN style="color: #000000; font-family: Times New Roman; font-size: medium;"&gt; &lt;SPAN style="color: #000000; font-size: medium; font-family: Times New Roman;"&gt;Usually the memory cache of the video frame buffer is disabled. And for the detail information,you can refer to the configuration of the last memory region that the board.c of any example of the SDK.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 21 Jan 2019 03:13:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LCDIF-and-Internal-RAM/m-p/883516#M2548</guid>
      <dc:creator>fangfang</dc:creator>
      <dc:date>2019-01-21T03:13:44Z</dc:date>
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