topic Re: RT1050 QSPI Flash Limitations in i.MX RT Crossover MCUs

RT1050 QSPI Flash Limitations

ryanshuttlewort — Wed, 29 Nov 2017 17:00:49 GMT

Hello I am using MCUXpresso IDE, version v10.1.0 [Build 589] [2017-11-14] with an MIMXRT1050-EVK SDK, version 2.3.0 (2017-11-16).

I am wondering if there are any limitations that may prevent the following write actions while simultaneously running an application out of the on-board QSPI Flash (IS25WP064):

device serialization data
calibration constants
configuration data
system log
historic interval data
new firmware image staging

i.e. can it simultaneously act as a persistent storage medium and what sort of limitations might be encountered?

Thanks.

Re: RT1050 QSPI Flash Limitations

weidong_sun — Thu, 30 Nov 2017 03:01:47 GMT

Hello Ryan,

On IMXRT1050EVK board, HyperFlash & QSPI NOR Flash can't be used simultaneously. From the schematic of EVK, you can find they are connected to the same interface (FlexSPI).

In MIMXRT1050 MCU, there are 2 QSPI controller and 4 LPSPI controllers, so these IPs are independent. there are no any limitations on operations.

Have a nice day!

TIC Weidong

Re: RT1050 QSPI Flash Limitations

ryanshuttlewort — Thu, 30 Nov 2017 15:23:47 GMT

Hello Wigros, thanks for the reply but that isn't exactly what I getting at. We intend to use only the QSPI Flash in our final design and what I am trying to understand is when we are running code out of QSPI Flash can we also use it as general purpose storage for the activities listed in the original message. i.e. as someone might use an EEPROM or serial Flash.

Thanks.

Re: RT1050 QSPI Flash Limitations

gaetano81 — Thu, 03 May 2018 10:42:10 GMT

Hello Ryan,

Did you find a solution for your question?

Regards

Gaetano

Re: RT1050 QSPI Flash Limitations

ScottKerstein — Fri, 01 Jun 2018 21:04:20 GMT

Hello,

I have the same question as Ryan and Gaetano that has gone unanswered.

Can one use one QSPI Flash for storage and a second QSPI Flash for code XIP simultaneously, if they are independent controllers?

Re: RT1050 QSPI Flash Limitations

john29 — Mon, 04 Jun 2018 16:11:05 GMT

To answer the original question: Yes you can run from QSPI Flash and use it as storage simultaneously. A single function that writes to the flash can be loaded into the RAM during runtime and executed from there.

Re: RT1050 QSPI Flash Limitations

tsantzi — Tue, 05 Jun 2018 15:33:13 GMT

Hi John,

This is a really interesting approach. Have you succeeded in doing this? Could you perhaps share code?

Many thanks,

Nikos

Re: RT1050 QSPI Flash Limitations

noahwang — Tue, 05 Jun 2018 21:39:07 GMT

As long as all your instructions are relative (which it should be by default), you can just map the function to a known location in flash and copy it into a known location in RAM just like any other data. Before you do an absolute jump to the RAM function, you must make sure that you've set the correct return data, and that you've disabled interrupts (they will access flash if they trip, unless you've remapped them as well)

Re: RT1050 QSPI Flash Limitations

john29 — Fri, 08 Jun 2018 08:57:46 GMT

Putting function into the RAM could be done by simply using a section macro “__RAMFUNC(SRAM_ITC)” from “cr_section_marcros.h” provided by NXP. Of course all function called inside that function should be also put into the RAM.

e.g.:

__RAMFUNC(SRAM_ITC)

static bool flexspi_write_sector(flexspiFlash *spiFlash)

{

bool bRet = false;

status_t status;

/* erase sector */

status = flexspi_nor_flash_erase_sector(spiFlash, spiFlash->m_stFlashData.u32CurrentSector *

spiFlash->m_stFlashData.u32SectorSize);

....

}

Re: RT1050 QSPI Flash Limitations

danielsanchezrb — Wed, 27 Jun 2018 13:11:52 GMT

Hi John,

I have already reached that point, saving some issues about moving code to RAM and having to refresh the cache.

But now I am facing new problems: regarding the SPI read/write operation it can not be performed due to the IPCMDEEREN error flag in the INTR register of FlexSPI. Performing the "write_enable" operation both "IPCMDERR" and "IPCMDONE" flags get set (and get cleared before exiting the function). What it could be the causes and how could I solve it?

Thank you and regards.

Re: RT1050 QSPI Flash Limitations

john29 — Thu, 28 Jun 2018 14:42:17 GMT

Hi Daniel,

I do not know for sure but maybe your definitions for the QSPI read/ write... sequence are not correct. Normally if you run from QSPI Flash at least the read should work. If you do not reinit the QSPI Flex driver and keep the settings from the boot up; it should use the definitions from the flash header so make sure those are correct. (NXP examples defines that in xip/evkbimxrt1050_flexspi_nor_config.c).

Best Regards

Re: RT1050 QSPI Flash Limitations

danielsanchezrb — Fri, 29 Jun 2018 08:32:59 GMT

Hi John,

Thank you for your reply. It seemed that the configuration I set up in the first 512 bytes of the flash (the configuration the ROM boot took from flash) isn't good at all. So I run the initialization procedure in the example and it works.

Once solved that problem I could read the vendor ID (0x16) and activate the QUAD operation mode, but have some issues regarding the write and erase operations. In the "wait_bus_busy" function a "READ STATUS" operation is performed, but above in the file, in the definition section the code is:

/* Read extend parameters */
[4 * FLASH_QSPI_CMD_LUT_SEQ_IDX_READSTATUS] =
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

I guess the code is intended to "read extend parameters", but when performing this operation I always read 0xFF, so the "wait_bus_busy" function always return "kStatus_fail". By changing the sequence command from "0x81" to "0x05" (read status command as it is in the IS25WP064A datasheet) the FlexSPI read 0x40, so the function return "success" status.

Regards

Re: RT1050 QSPI Flash Limitations

gaetano81 — Tue, 14 Aug 2018 14:41:05 GMT

@Daniel Sanchez
Can you share code used to relocate code in RAM?

I am trying to place code into ITCM RAM but I get HARD_Fault exception "an imprecise data access error has occurred".

I add to icf file:

/* 64K ITCM RAM */
define symbol m_text_ram_start = 0x00000000;
define symbol m_text_ram_end = 0x0000FFFF;

...

....

define region TEXT_RAM_region = mem:[from m_text_ram_start to m_text_ram_end-100];

define block RamCode {section .textrw};

initialize by copy { readwrite, section .textrw };

....

place in TEXT_RAM_region { block RamCode };

and finally place #pragma location directive in my code

#pragma location=".textrw"
void fn(void)

If I place code in DTCM work fine.

Re: RT1050 QSPI Flash Limitations

danielsanchezrb — Mon, 27 Aug 2018 07:44:00 GMT

Hi Gaetano,

For placing functions in RAM I use "__RAM_FUNC" decined in <cr_section_macros.h> (located at the MCU IDE include path):

__RAM_FUNC
static status_t FLASH_QSPI_InternInit(void)
{
status_t ret = kStatus_Fail;

...

/* All function calls within this function must be declared in RAM */

...

return ret;
}

I had some issues when starting moving the functions to RAM. I solved by disabling the data cache and IRQ:

primask = DisableGlobalIRQ();
{
L1CACHE_DisableDCache();
L1CACHE_CleanDCache();
error = FLASH_QSPI_InternInit(); /* This function is declared in RAM section. */
L1CACHE_InvalidateICache();
L1CACHE_EnableDCache();
}
EnableGlobalIRQ(primask);

Not sure if it is the proper way to do it, but it worked for me.

Regards,

Re: RT1050 QSPI Flash Limitations

thivya_ashokkum — Tue, 04 Feb 2020 18:32:11 GMT

Hi Daniel,

I had issues when I was trying to move the flexspi commands to RAM and when I followed your method, I was able to resolve it. However, I see another issue wherein I'm able to perform flash erases and writes as needed but if I power off the unit and power it on again, it doesn't even boot. The first run is always fine after I flash the code to my board but if I power cycle it, it stops booting. The board is almost dead. Did you come across anything like this? This happens only when I have all the flash operations active, otherwise my application works as expected even on power cycling the board.

Thanks,

Thivya

Re: RT1050 QSPI Flash Limitations

danielsanchezrb — Thu, 06 Feb 2020 09:17:23 GMT

Hi Thivya,

The first thing it comes to my mind is that maybe you are writing/erasing unintencionally over the first flash sector. Or over the program memory.

Whatever the configuration you use to perform the flash operations (or give back to keep the program running from QSPI) after a power cycle that configuration should be reset back to the configuration given in the first flash sector. So verify your erasing/writing address.

Regards,

Dani

Re: RT1050 QSPI Flash Limitations

thivya_ashokkum — Thu, 06 Feb 2020 23:46:39 GMT

Hi Daniel,

Thanks for the suggestion. I did keep a tab for the FlexSPI configuration which goes into the first sector of the flash and it remained intact after my flash erase/write operations. However, I was using the sector starting at 63000000 for writing my data. (I have a 64 MB flash). On viewing the memory, I could see the flexspi configuration being stored at 60000000, 61000000, 62000000 & 63000000 which I did not expect. So, every time I wrote to a sector starting at 63000000, the device couldn't boot. When I moved my write address to 63100000, my issue was resolved. Did you know about this?

Re: RT1050 QSPI Flash Limitations

danielsanchezrb — Mon, 10 Feb 2020 08:20:12 GMT

Hi Thivya,

It seems that regions 0x60000000, 0x61000000, 0x62000000 and 0x63000000 are actually the same phisical section at your flash: 0x00000000. So writting/erasing at address 0x63000000 is making a write/erase operation at phisical address 0x00000000. I would check that by monitoring address 0x00000000 after any operation. If that is what it is happening maybe the flash size is wrong: maybe there is another chip at the board or maybe the memory is 64Mb instead of 64MB.

Another thing it cames to my mind is that when you are configuring the FlexSPI LUT you are setting addresses of 24 bits (0x18):

[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),

In your case addresses should be of 32 bits:

[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x20),

I hope this can help you.

Regards,

Dani

Re: RT1050 QSPI Flash Limitations

venugopal_v — Tue, 23 Jun 2020 06:25:48 GMT

hello, i had requirement to store data as well program in same QSPI flash with imx rt 1050 i followed above process with different method that is through linker scrips to relocate all flexspi code to ITC ram . hope this would help

Dropbox - BEL2_flexspi_nor_polling_transfer.7z - Simplify your life