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    <title>topic Re: LVGL example project with IMXRT1060 internal RAM only in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1627640#M24427</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/140033"&gt;@patriciocohen&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;This is because the MPU region size should be 2^N, 5&amp;lt;=N&amp;lt;=32, region base should be multiples of size.&lt;/P&gt;
&lt;P&gt;From 0x20220000, the maximum noncacheable region size can be 128k. From 0x20200000, the maximum size can be 512k.&lt;/P&gt;
&lt;P&gt;If you need a 640k noncacheable space, you can apply two continuous space, the first one from 0x20200000 to 0x20280000, that is 512k. The second one from 0x20280000 to 0x202a0000, that is 128k. You must add this setting into&amp;nbsp;BOARD_ConfigMPU().&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
    <pubDate>Tue, 04 Apr 2023 11:26:59 GMT</pubDate>
    <dc:creator>jingpan</dc:creator>
    <dc:date>2023-04-04T11:26:59Z</dc:date>
    <item>
      <title>LVGL example project with IMXRT1060 internal RAM only</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1626411#M24395</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;My custom board has no external RAM. We need to design a simple GUI for our application, so we think that the internal memory of the IMXRT1062CVJ5B could be enough for this purpose.&lt;/P&gt;&lt;P&gt;I'm trying with the &lt;STRONG&gt;lvgl demo widgets bm&amp;nbsp;&lt;/STRONG&gt;example.&lt;/P&gt;&lt;P&gt;I modified the memory details as follows:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="patriciocohen_0-1680395138215.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217408i0BC49DCFF0AED05D/image-size/large?v=v2&amp;amp;px=999" role="button" title="patriciocohen_0-1680395138215.png" alt="patriciocohen_0-1680395138215.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The NCACHE_REGION now is A0000 bytes in size, taking this space from the OCRAM section.&lt;/P&gt;&lt;P&gt;Because the original SRAM_OC section was C0000, now after the update is 20000 in size.&lt;/P&gt;&lt;P&gt;Is this correct?&lt;/P&gt;&lt;P&gt;The program builds correctly and it is downloaded ok to my board, however execution stops at the following line:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="patriciocohen_1-1680395332524.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/217409iB1D2AF3D4FE24DD8/image-size/large?v=v2&amp;amp;px=999" role="button" title="patriciocohen_1-1680395332524.png" alt="patriciocohen_1-1680395332524.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Is this because my memory config is wrong?&lt;/P&gt;&lt;P&gt;If the program cannot be fitted inside internal RAM, what can I do to reduce its size?&lt;/P&gt;&lt;P&gt;Can you please point to an example that doesn't use external board SDRAM?&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Patricio&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 02 Apr 2023 00:35:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1626411#M24395</guid>
      <dc:creator>patriciocohen</dc:creator>
      <dc:date>2023-04-02T00:35:58Z</dc:date>
    </item>
    <item>
      <title>Re: LVGL example project with IMXRT1060 internal RAM only</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1627640#M24427</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/140033"&gt;@patriciocohen&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;This is because the MPU region size should be 2^N, 5&amp;lt;=N&amp;lt;=32, region base should be multiples of size.&lt;/P&gt;
&lt;P&gt;From 0x20220000, the maximum noncacheable region size can be 128k. From 0x20200000, the maximum size can be 512k.&lt;/P&gt;
&lt;P&gt;If you need a 640k noncacheable space, you can apply two continuous space, the first one from 0x20200000 to 0x20280000, that is 512k. The second one from 0x20280000 to 0x202a0000, that is 128k. You must add this setting into&amp;nbsp;BOARD_ConfigMPU().&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 11:26:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1627640#M24427</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2023-04-04T11:26:59Z</dc:date>
    </item>
    <item>
      <title>Re: LVGL example project with IMXRT1060 internal RAM only</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1627674#M24429</link>
      <description>&lt;P&gt;Thank you Jing&lt;/P&gt;</description>
      <pubDate>Tue, 04 Apr 2023 12:31:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/LVGL-example-project-with-IMXRT1060-internal-RAM-only/m-p/1627674#M24429</guid>
      <dc:creator>patriciocohen</dc:creator>
      <dc:date>2023-04-04T12:31:00Z</dc:date>
    </item>
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