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    <title>i.MX RT Crossover MCUsのトピックIs there any errata regarding MIPI_CSI2 RX Controller supported data format?</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1612503#M24050</link>
    <description>&lt;P&gt;I re-checked the MIPI-CSI2 Peripheral in IMX Reference Manual. In below screenshots, there is no sign that CSI2 RX Controller supports ITU-R.BT656 protocol or not. However it supports YUV422 and RGB565 data formats and other RGB/YUV different bit combinations.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_0-1678372919199.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213899i1F24E6E5681A2316/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_0-1678372919199.png" alt="burhanh_0-1678372919199.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_1-1678372975989.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213900i3D23907A4380E5B1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_1-1678372975989.png" alt="burhanh_1-1678372975989.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;As I mentioned in other ticket&amp;nbsp;&lt;LI-MESSAGE title="does imxrt1170 MIPI-CSI2 peripheral support serial itu-r.bt656 format?" uid="1611719" url="https://community.nxp.com/t5/i-MX-RT/does-imxrt1170-MIPI-CSI2-peripheral-support-serial-itu-r-bt656/m-p/1611719#U1611719" discussion_style_icon_css="lia-mention-container-editor-message lia-img-icon-forum-thread lia-fa-icon lia-fa-forum lia-fa-thread lia-fa"&gt;&lt;/LI-MESSAGE&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;ADV7280-M sends active YUV422 video data within a form of ITU-R.BT656 protocol packet inside. Here is the ITU-R.BT656 format structure.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_0-1678426902219.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213994iC63F130DA5FF148F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_0-1678426902219.png" alt="burhanh_0-1678426902219.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So I suspect that MIPI CSI2 RX Controller is not even aware of ITU 656 format. That is why I could not get video from adv chip. Waiting your thoughts/recommendations.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 10 Mar 2023 05:41:58 GMT</pubDate>
    <dc:creator>burhanhagi</dc:creator>
    <dc:date>2023-03-10T05:41:58Z</dc:date>
    <item>
      <title>Is there any errata regarding MIPI_CSI2 RX Controller supported data format?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1612503#M24050</link>
      <description>&lt;P&gt;I re-checked the MIPI-CSI2 Peripheral in IMX Reference Manual. In below screenshots, there is no sign that CSI2 RX Controller supports ITU-R.BT656 protocol or not. However it supports YUV422 and RGB565 data formats and other RGB/YUV different bit combinations.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_0-1678372919199.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213899i1F24E6E5681A2316/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_0-1678372919199.png" alt="burhanh_0-1678372919199.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_1-1678372975989.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213900i3D23907A4380E5B1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_1-1678372975989.png" alt="burhanh_1-1678372975989.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;As I mentioned in other ticket&amp;nbsp;&lt;LI-MESSAGE title="does imxrt1170 MIPI-CSI2 peripheral support serial itu-r.bt656 format?" uid="1611719" url="https://community.nxp.com/t5/i-MX-RT/does-imxrt1170-MIPI-CSI2-peripheral-support-serial-itu-r-bt656/m-p/1611719#U1611719" discussion_style_icon_css="lia-mention-container-editor-message lia-img-icon-forum-thread lia-fa-icon lia-fa-forum lia-fa-thread lia-fa"&gt;&lt;/LI-MESSAGE&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;ADV7280-M sends active YUV422 video data within a form of ITU-R.BT656 protocol packet inside. Here is the ITU-R.BT656 format structure.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="burhanh_0-1678426902219.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213994iC63F130DA5FF148F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="burhanh_0-1678426902219.png" alt="burhanh_0-1678426902219.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So I suspect that MIPI CSI2 RX Controller is not even aware of ITU 656 format. That is why I could not get video from adv chip. Waiting your thoughts/recommendations.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 10 Mar 2023 05:41:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1612503#M24050</guid>
      <dc:creator>burhanhagi</dc:creator>
      <dc:date>2023-03-10T05:41:58Z</dc:date>
    </item>
    <item>
      <title>Re: Is there any errata regarding MIPI_CSI2 RX Controller supported data format?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1613980#M24101</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201543"&gt;@burhanhagi&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Yes, it doesn't support BT656.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
      <pubDate>Mon, 13 Mar 2023 10:37:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1613980#M24101</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2023-03-13T10:37:40Z</dc:date>
    </item>
    <item>
      <title>Re: Is there any errata regarding MIPI_CSI2 RX Controller supported data format?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1619694#M24209</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/61241"&gt;@jingpan&lt;/a&gt;,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;At&amp;nbsp;last, I am now able to run ADV7280M with NXP IMXRT1176. I can get live video over it. My above post is actually wrong.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;ADV7280M actually gives its output as YUV422. MIPI CSI data format and&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;ITU-R.BT656&amp;nbsp;format is totally different.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;In order to run ADV7280-M MIPI CSI, one must run NXP IMXRT CSI peripheral in CSI gated clock mode with HSYNC active HIGH.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 22 Mar 2023 10:04:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Is-there-any-errata-regarding-MIPI-CSI2-RX-Controller-supported/m-p/1619694#M24209</guid>
      <dc:creator>burhanhagi</dc:creator>
      <dc:date>2023-03-22T10:04:12Z</dc:date>
    </item>
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