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    <title>topic Re: Addr Pin allocation between RT1052 and SDRAM in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878797#M2376</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have a look at the schematics for the EVK for the RT1052:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license" title="https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license"&gt;https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;(more here:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK" title="https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK"&gt;i.MX RT1050 Evaluation Kit|NXP&lt;/A&gt;&amp;nbsp;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(just a note, I would personally not select a SDRAM that has a datasheet that dates back to 2012. In my RT1062/1064 designs I use the same SDRAM as NXP uses on their EVK's, make things easier. But maybe you have good reasons to use the Winbond device)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below is a snip of the schematic from one of my designs, its for RT1062/RT1064 but If I'm not mistaken, the 1052 is very similar, but please check carefully !?!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62620i261388261378F89E/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&amp;nbsp; &amp;nbsp;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62805i179538BEC7ED76E5/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Jan 2019 18:26:23 GMT</pubDate>
    <dc:creator>carstengroen</dc:creator>
    <dc:date>2019-01-16T18:26:23Z</dc:date>
    <item>
      <title>Addr Pin allocation between RT1052 and SDRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878796#M2375</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We need to add one SDRAM in our project on IMX RT1052,here comes a question since this is my first time to use SDRAM and I can't find the official explantion both on NXP and the SDRAM manufactor.The RT1052 has 13bit pin(A0-A12) address&amp;nbsp; to allocate while the SDRAM we select just have 12bit pin (SA0--SA11), how should I connect them togerther. PS.The SDRAM we select is W9812G6JB from WinBond.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 10:39:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878796#M2375</guid>
      <dc:creator>1509831698</dc:creator>
      <dc:date>2019-01-16T10:39:07Z</dc:date>
    </item>
    <item>
      <title>Re: Addr Pin allocation between RT1052 and SDRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878797#M2376</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have a look at the schematics for the EVK for the RT1052:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license" title="https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license"&gt;https://www.nxp.com/webapp/Download?colCode=MIMXRT1050-EVK-DESIGNFILES-A1&amp;amp;appType=license&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;(more here:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK" title="https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK"&gt;i.MX RT1050 Evaluation Kit|NXP&lt;/A&gt;&amp;nbsp;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(just a note, I would personally not select a SDRAM that has a datasheet that dates back to 2012. In my RT1062/1064 designs I use the same SDRAM as NXP uses on their EVK's, make things easier. But maybe you have good reasons to use the Winbond device)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below is a snip of the schematic from one of my designs, its for RT1062/RT1064 but If I'm not mistaken, the 1052 is very similar, but please check carefully !?!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62620i261388261378F89E/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&amp;nbsp; &amp;nbsp;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/62805i179538BEC7ED76E5/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 18:26:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878797#M2376</guid>
      <dc:creator>carstengroen</dc:creator>
      <dc:date>2019-01-16T18:26:23Z</dc:date>
    </item>
    <item>
      <title>Re: Addr Pin allocation between RT1052 and SDRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878798#M2377</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ths. The EVK default use 256M SDRAM,so it need 13bit address pin and we just need 128M SDRAM considering cost and our application.While the common&amp;nbsp; numbers of address pin in 128M SDRAM I have found are all 12bit with A0--A11 for row and A0-A8 for column.That's the confuse I have meet.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Jan 2019 01:10:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Addr-Pin-allocation-between-RT1052-and-SDRAM/m-p/878798#M2377</guid>
      <dc:creator>1509831698</dc:creator>
      <dc:date>2019-01-17T01:10:39Z</dc:date>
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