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    <title>topic Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1586473#M23391</link>
    <description>&lt;P&gt;Dear Support Team,&lt;/P&gt;&lt;P&gt;I am getting error while erasing the IMX1052 board and following is the error:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="sunil_embex_0-1674458238130.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/208122i94B6D91157A9FAD8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="sunil_embex_0-1674458238130.png" alt="sunil_embex_0-1674458238130.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="sunil_embex_1-1674458370100.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/208123i7B6B384754B8416B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="sunil_embex_1-1674458370100.png" alt="sunil_embex_1-1674458370100.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below are the logs:&lt;/P&gt;&lt;P&gt;J-Link uptime (since boot): 0d 00h 22m 13s&lt;BR /&gt;S/N: 505103350&lt;BR /&gt;License(s): RDI, FlashBP, FlashDL, JFlash, GDB&lt;BR /&gt;USB speed mode: High speed (480 MBit/s)&lt;BR /&gt;VTref=3.286V&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Type "connect" to establish a target connection, '?' for help&lt;BR /&gt;J-Link&amp;gt;connect&lt;BR /&gt;Please specify device / core. &amp;lt;Default&amp;gt;: MIMXRT1051XXXXA&lt;BR /&gt;Type '?' for selection dialog&lt;BR /&gt;Device&amp;gt;?&lt;BR /&gt;Please specify target interface:&lt;BR /&gt;J) JTAG (Default)&lt;BR /&gt;S) SWD&lt;BR /&gt;T) cJTAG&lt;BR /&gt;TIF&amp;gt;S&lt;BR /&gt;Specify target interface speed [kHz]. &amp;lt;Default&amp;gt;: 4000 kHz&lt;BR /&gt;Speed&amp;gt;&lt;BR /&gt;Device "MIMXRT1052XXXXB" selected.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Connecting to target via SWD&lt;BR /&gt;Found SW-DP with ID 0x0BD11477&lt;BR /&gt;DPIDR: 0x0BD11477&lt;BR /&gt;CoreSight SoC-400 or earlier&lt;BR /&gt;Scanning AP map to find all available APs&lt;BR /&gt;AP[1]: Stopped AP scan as end of AP map has been reached&lt;BR /&gt;AP[0]: AHB-AP (IDR: 0x04770041)&lt;BR /&gt;Iterating through AP map to find AHB-AP to use&lt;BR /&gt;AP[0]: Core found&lt;BR /&gt;AP[0]: AHB-AP ROM base: 0xE00FD000&lt;BR /&gt;CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)&lt;BR /&gt;Found Cortex-M7 r1p1, Little endian.&lt;BR /&gt;FPUnit: 8 code (BP) slots and 0 literal slots&lt;BR /&gt;CoreSight components:&lt;BR /&gt;ROMTbl[0] @ E00FD000&lt;BR /&gt;[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table&lt;BR /&gt;ROMTbl[1] @ E00FE000&lt;BR /&gt;[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table&lt;BR /&gt;ROMTbl[2] @ E00FF000&lt;BR /&gt;[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7&lt;BR /&gt;[2][1]: E0001000 CID B105E00D PID 000BB002 DWT&lt;BR /&gt;[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7&lt;BR /&gt;[2][3]: E0000000 CID B105E00D PID 000BB001 ITM&lt;BR /&gt;[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7&lt;BR /&gt;[1][2]: E0042000 CID B105900D PID 004BB906 CTI&lt;BR /&gt;[0][1]: E0040000 CID B105900D PID 000BB9A9 TPIU-M7&lt;BR /&gt;[0][2]: E0043000 CID B105F00D PID 001BB101 TSG&lt;BR /&gt;Cache: Separate I- and D-cache.&lt;BR /&gt;I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way&lt;BR /&gt;D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way&lt;BR /&gt;Memory zones:&lt;BR /&gt;Zone: Default Description: Default access mode&lt;BR /&gt;Cortex-M7 identified.&lt;BR /&gt;J-Link&amp;gt;erase&lt;BR /&gt;No address range specified, 'Erase Chip' will be executed&lt;BR /&gt;'erase': Performing implicit reset &amp;amp; halt of MCU.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;Erasing device...&lt;BR /&gt;J-Link: Flash download: Only internal flash banks will be erased.&lt;BR /&gt;To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"&lt;BR /&gt;Erasing done.&lt;BR /&gt;J-Link&amp;gt;exec EnableEraseAllFlashBanks&lt;BR /&gt;J-Link&amp;gt;r&lt;BR /&gt;Reset delay: 0 ms&lt;BR /&gt;Reset type NORMAL: Resets core &amp;amp; peripherals via SYSRESETREQ &amp;amp; VECTRESET bit.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;J-Link&amp;gt;erase&lt;BR /&gt;No address range specified, 'Erase Chip' will be executed&lt;BR /&gt;'erase': Performing implicit reset &amp;amp; halt of MCU.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;Erasing device...&lt;/P&gt;&lt;P&gt;****** Error: Timeout while preparing target, core does not stop. (PC = 0x2000017A, XPSR = 0x41000000, SP = 0x20000B18)!&lt;BR /&gt;Failed to perform RAMCode-sided Prepare()&lt;BR /&gt;ERROR: Erase returned with error code -1.&lt;BR /&gt;J-Link&amp;gt;&lt;/P&gt;&lt;P&gt;Let me know if you need more information.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sunil&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 23 Jan 2023 07:20:27 GMT</pubDate>
    <dc:creator>sunil_embex</dc:creator>
    <dc:date>2023-01-23T07:20:27Z</dc:date>
    <item>
      <title>How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1460597#M19645</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;As AN12419, I have programmed the&amp;nbsp;secure JTAG eFuse. Below are the details.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Program the response key,&amp;nbsp;SJC_RESP&lt;/LI&gt;&lt;LI&gt;Program 0x1 in the eFuse JTAG_SMODE to switch the SJC to Secure JTAG mode&lt;/LI&gt;&lt;LI&gt;Program 0x1 in the eFuse KTE_FUSE&lt;/LI&gt;&lt;LI&gt;Program&amp;nbsp;0x1 in the eFuse SJC_RESP_LOCK to disable read/write access of the secret response key&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;I haven't programed 0x1 in the eFuse DAP_SJC_SWD_SEL to switch the DAP to the JTAG mode. Because my board uses SWD interface. I created a file of&amp;nbsp;NXP_RT1052_SecureJTAG.JlinkScript as&amp;nbsp;&lt;EM&gt;4.2 Example of SEGGER J-link Secure JTAG unlock script&lt;/EM&gt;. Use the below command to connect the device. It failed to connect to the device.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if &lt;FONT color="#FF0000"&gt;SWD&lt;/FONT&gt; -speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;I have tried several times and found that if I send below command first. Then repeat above command, it works.&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if &lt;FONT color="#FF0000"&gt;JTAG&lt;/FONT&gt; -speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Do you have any suggestion (JlinkScript and command) about SWD interface?&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 19 May 2022 06:15:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1460597#M19645</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2022-05-19T06:15:03Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461253#M19661</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183333"&gt;@JerryQian_132&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;To RT10XX, the default debug interface is SWD interface, if you want ot use the JTAG, you need to burn the related fuse bit from SWD to JTAG.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; But, please note, fuse, just can from 0 to 1, can't be back.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; So, if you already switch it to the JTAG, just use the JTAG debug, SWD can't be used anymore, and fuse can't be back.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Fri, 20 May 2022 03:10:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461253#M19661</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-05-20T03:10:03Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461320#M19670</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Kerry, I don't want to use JTAG interface. I'm using SWD interface. I haven't programmed the&amp;nbsp;0x1 in the eFuse DAP_SJC_SWD_SEL. It's still 0 to select SWD. My question is how to&amp;nbsp;debug(or unlock) with SWD interface.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I found I have to send below two commands to unlock secure JTAG when use SWD interface.&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if&amp;nbsp;&lt;FONT color="#FF0000"&gt;JTAG&lt;/FONT&gt;&amp;nbsp;-speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;/LI&gt;&lt;LI&gt;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if&amp;nbsp;&lt;FONT color="#FF0000"&gt;SWD&lt;/FONT&gt;&amp;nbsp;-speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Is there any method to send one command to unlock secure JTAG (using SWD interface)?&lt;/P&gt;</description>
      <pubDate>Fri, 20 May 2022 05:45:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461320#M19670</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2022-05-20T05:45:45Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461480#M19678</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183333"&gt;@JerryQian_132&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;My understand is, the secure mode just support the JTAG, not the SWD.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Do you mean, you use your SWD command, and associated with&amp;nbsp;SEGGER J-link Secure JTAG unlock script, you can unlock the chip?&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Can you also share some unlock screen about it, just like the&amp;nbsp;AN12419 4.1 Steps to connect J-Link debugger via Secure JTAG&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Then, I will help you to check it internaly.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 20 May 2022 09:02:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1461480#M19678</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-05-20T09:02:26Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462016#M19696</link>
      <description>&lt;P&gt;Hi Kerry,&lt;/P&gt;&lt;P&gt;Sure. The eFuse settings are&amp;nbsp;0x400 : 0x40128043 and&amp;nbsp;0x460 : 0x04400012.&lt;/P&gt;&lt;P&gt;My test script has attached. Below are my steps.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Step 1: reboot the device&lt;/LI&gt;&lt;LI&gt;Step 2:&amp;nbsp;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if&amp;nbsp;&lt;FONT color="#FF0000"&gt;SWD&lt;/FONT&gt;&amp;nbsp;-speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;BR /&gt;Cannot connect to the target&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Step 2.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180534i006A0FFAF47040AC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Step 2.png" alt="Step 2.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI&gt;Step 3:&amp;nbsp;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if &lt;FONT color="#ff0000"&gt;JTAG&amp;nbsp;&lt;/FONT&gt;-speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;BR /&gt;Cannot connect to the target. But can read the challenge ID&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Step 3.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180533i4EDAFCEAA40487F7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Step 3.png" alt="Step 3.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI&gt;Step 4:&amp;nbsp;jlink.exe -JLinkScriptFile NXP_RT1052_SecureJTAG.JlinkScript -device MCIMXRT1052 -if&amp;nbsp;&lt;FONT color="#FF0000"&gt;SWD&lt;/FONT&gt;&amp;nbsp;-speed 4000 -autoconnect 1 -JTAGConf -1,-1&lt;BR /&gt;Cannot read the challenge ID. But can connect to the target.&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Step 4.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180536i043CABC3A8026D49/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Step 4.png" alt="Step 4.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Is it possible that combine step 3 and 4 with one command? Change the script?&lt;/P&gt;</description>
      <pubDate>Mon, 23 May 2022 01:56:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462016#M19696</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2022-05-23T01:56:48Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462293#M19704</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183333"&gt;@JerryQian_132&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Today, I talk your issue with our AE, and I get the information that, to the secure debug, our RT just support the secure JTAG, not support the secure SWD, so, your this type testing is no meanning.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you want to use the secure debug interface, you still need to use the Secure JTAG, not the SWD. If you just want to debug, SWD is OK, you don't need to add the secure.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Thanks a lot for your understanding.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Mon, 23 May 2022 08:42:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462293#M19704</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-05-23T08:42:10Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462779#M19712</link>
      <description>&lt;P&gt;OK. Does it mean the authentication process (secure JTAG mechainsm) only supports JTAG interface? I have to finish the&amp;nbsp;authentication (secret response key) with JTAG interface first. Then can debug with SWD interface?&lt;/P&gt;&lt;P&gt;I have tried below process. It works.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Run "jlink.exe -JLinkScriptFile C:\QIANJE\02_SourceCode\RavenPendant\MCU\Build\RavenPendant_SecureJTAG.JlinkScript -device MCIMXRT1052 -if JTAG -speed 4000 -autoconnect 1 -JTAGConf -1,-1" to unlock the device.&lt;/LI&gt;&lt;LI&gt;Open IAR to debug my code&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Tue, 24 May 2022 01:25:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462779#M19712</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2022-05-24T01:25:32Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462789#M19714</link>
      <description>&lt;P&gt;My board only reserved the SWD interface. But for security requirement, I have to enable the secure JTAG. After programmed the eFuse bits, I'm investigating how to debug with SWD interface.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Reboot the device. IAR cannot debug my code.&lt;/LI&gt;&lt;LI&gt;Reboot the device. Send my SWD command and&amp;nbsp;&lt;SPAN&gt;associated with&amp;nbsp;SEGGER J-link Secure JTAG unlock script. IAR still cannot debug.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Reboot the device.&amp;nbsp;Send my JTAG command and&amp;nbsp;my SWD command and&amp;nbsp;associated with&amp;nbsp;SEGGER J-link Secure JTAG unlock script. IAR can debug.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;Reboot the device. Send my JTAG command and&amp;nbsp;associated with&amp;nbsp;SEGGER J-link Secure JTAG unlock script. IAR can debug.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;So, my questions are&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;Does only secure JTAG interface support the authentication process?&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;After finish the authentication, can switch to SWD interface to debug? From step 4, seems yes.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Tue, 24 May 2022 01:37:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462789#M19714</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2022-05-24T01:37:09Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462860#M19718</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183333"&gt;@JerryQian_132&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Answer your questions:&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Does it mean the authentication process (secure JTAG mechainsm) only supports JTAG interface?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt;Yes, so you still need to use the JTAG, I mean, you need to follow the AN to burn the JTAG interface, then use the JTAG debug instead of the SWD, as the fuse can't be back.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Does only secure JTAG interface support the authentication process?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; Yes, yesterday our AE confirm it.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;After finish the authentication, can switch to SWD interface to debug? From step 4, seems yes.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; After you use the JTAG secure with JTAG interface, can't back to SWD. Just use the JTAG instead of the SWD. You board should use the JTAG, follow the NXP EVK JTAG interface.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 24 May 2022 04:01:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462860#M19718</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-05-24T04:01:01Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462861#M19719</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183333" target="_blank"&gt;@JerryQian_Shure&lt;/A&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Answer your questions:&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Does it mean the authentication process (secure JTAG mechainsm) only supports JTAG interface?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt;Yes, so you still need to use the JTAG, I mean, you need to follow the AN to burn the JTAG interface, then use the JTAG debug instead of the SWD, as the fuse can't be back.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Does only secure JTAG interface support the authentication process?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; Yes, yesterday our AE confirm it.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;After finish the authentication, can switch to SWD interface to debug? From step 4, seems yes.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; After you use the JTAG secure with JTAG interface, can't back to SWD. Just use the JTAG instead of the SWD. You board should use the JTAG, follow the NXP EVK JTAG interface.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 24 May 2022 04:01:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1462861#M19719</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-05-24T04:01:53Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1579595#M23231</link>
      <description>&lt;P&gt;Did it work with JTAG interface as Kerry said right? Or did it work with SWD interface?&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Jan 2023 00:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1579595#M23231</guid>
      <dc:creator>vanessa_dis</dc:creator>
      <dc:date>2023-01-10T00:06:07Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1579757#M23236</link>
      <description>&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;It works with JTAG interface on my board.&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Tue, 10 Jan 2023 05:59:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1579757#M23236</guid>
      <dc:creator>JerryQian_132</dc:creator>
      <dc:date>2023-01-10T05:59:52Z</dc:date>
    </item>
    <item>
      <title>Re: How to debug iMX.RT105x with SWD interface after programming secure JTAG eFuse</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1586473#M23391</link>
      <description>&lt;P&gt;Dear Support Team,&lt;/P&gt;&lt;P&gt;I am getting error while erasing the IMX1052 board and following is the error:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="sunil_embex_0-1674458238130.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/208122i94B6D91157A9FAD8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="sunil_embex_0-1674458238130.png" alt="sunil_embex_0-1674458238130.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="sunil_embex_1-1674458370100.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/208123i7B6B384754B8416B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="sunil_embex_1-1674458370100.png" alt="sunil_embex_1-1674458370100.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below are the logs:&lt;/P&gt;&lt;P&gt;J-Link uptime (since boot): 0d 00h 22m 13s&lt;BR /&gt;S/N: 505103350&lt;BR /&gt;License(s): RDI, FlashBP, FlashDL, JFlash, GDB&lt;BR /&gt;USB speed mode: High speed (480 MBit/s)&lt;BR /&gt;VTref=3.286V&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Type "connect" to establish a target connection, '?' for help&lt;BR /&gt;J-Link&amp;gt;connect&lt;BR /&gt;Please specify device / core. &amp;lt;Default&amp;gt;: MIMXRT1051XXXXA&lt;BR /&gt;Type '?' for selection dialog&lt;BR /&gt;Device&amp;gt;?&lt;BR /&gt;Please specify target interface:&lt;BR /&gt;J) JTAG (Default)&lt;BR /&gt;S) SWD&lt;BR /&gt;T) cJTAG&lt;BR /&gt;TIF&amp;gt;S&lt;BR /&gt;Specify target interface speed [kHz]. &amp;lt;Default&amp;gt;: 4000 kHz&lt;BR /&gt;Speed&amp;gt;&lt;BR /&gt;Device "MIMXRT1052XXXXB" selected.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Connecting to target via SWD&lt;BR /&gt;Found SW-DP with ID 0x0BD11477&lt;BR /&gt;DPIDR: 0x0BD11477&lt;BR /&gt;CoreSight SoC-400 or earlier&lt;BR /&gt;Scanning AP map to find all available APs&lt;BR /&gt;AP[1]: Stopped AP scan as end of AP map has been reached&lt;BR /&gt;AP[0]: AHB-AP (IDR: 0x04770041)&lt;BR /&gt;Iterating through AP map to find AHB-AP to use&lt;BR /&gt;AP[0]: Core found&lt;BR /&gt;AP[0]: AHB-AP ROM base: 0xE00FD000&lt;BR /&gt;CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)&lt;BR /&gt;Found Cortex-M7 r1p1, Little endian.&lt;BR /&gt;FPUnit: 8 code (BP) slots and 0 literal slots&lt;BR /&gt;CoreSight components:&lt;BR /&gt;ROMTbl[0] @ E00FD000&lt;BR /&gt;[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table&lt;BR /&gt;ROMTbl[1] @ E00FE000&lt;BR /&gt;[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table&lt;BR /&gt;ROMTbl[2] @ E00FF000&lt;BR /&gt;[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7&lt;BR /&gt;[2][1]: E0001000 CID B105E00D PID 000BB002 DWT&lt;BR /&gt;[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7&lt;BR /&gt;[2][3]: E0000000 CID B105E00D PID 000BB001 ITM&lt;BR /&gt;[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7&lt;BR /&gt;[1][2]: E0042000 CID B105900D PID 004BB906 CTI&lt;BR /&gt;[0][1]: E0040000 CID B105900D PID 000BB9A9 TPIU-M7&lt;BR /&gt;[0][2]: E0043000 CID B105F00D PID 001BB101 TSG&lt;BR /&gt;Cache: Separate I- and D-cache.&lt;BR /&gt;I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way&lt;BR /&gt;D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way&lt;BR /&gt;Memory zones:&lt;BR /&gt;Zone: Default Description: Default access mode&lt;BR /&gt;Cortex-M7 identified.&lt;BR /&gt;J-Link&amp;gt;erase&lt;BR /&gt;No address range specified, 'Erase Chip' will be executed&lt;BR /&gt;'erase': Performing implicit reset &amp;amp; halt of MCU.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;Erasing device...&lt;BR /&gt;J-Link: Flash download: Only internal flash banks will be erased.&lt;BR /&gt;To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"&lt;BR /&gt;Erasing done.&lt;BR /&gt;J-Link&amp;gt;exec EnableEraseAllFlashBanks&lt;BR /&gt;J-Link&amp;gt;r&lt;BR /&gt;Reset delay: 0 ms&lt;BR /&gt;Reset type NORMAL: Resets core &amp;amp; peripherals via SYSRESETREQ &amp;amp; VECTRESET bit.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;J-Link&amp;gt;erase&lt;BR /&gt;No address range specified, 'Erase Chip' will be executed&lt;BR /&gt;'erase': Performing implicit reset &amp;amp; halt of MCU.&lt;BR /&gt;ResetTarget() start&lt;BR /&gt;ResetTarget() end&lt;BR /&gt;AfterResetTarget() start&lt;BR /&gt;AfterResetTarget() end&lt;BR /&gt;Erasing device...&lt;/P&gt;&lt;P&gt;****** Error: Timeout while preparing target, core does not stop. (PC = 0x2000017A, XPSR = 0x41000000, SP = 0x20000B18)!&lt;BR /&gt;Failed to perform RAMCode-sided Prepare()&lt;BR /&gt;ERROR: Erase returned with error code -1.&lt;BR /&gt;J-Link&amp;gt;&lt;/P&gt;&lt;P&gt;Let me know if you need more information.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sunil&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 23 Jan 2023 07:20:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-debug-iMX-RT105x-with-SWD-interface-after-programming/m-p/1586473#M23391</guid>
      <dc:creator>sunil_embex</dc:creator>
      <dc:date>2023-01-23T07:20:27Z</dc:date>
    </item>
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