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    <title>topic Re: Run Time integrity check(RTIC) in SBL and SFW for iMXRT1170 in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1583151#M23301</link>
    <description>&lt;P&gt;Thank you for reply,&lt;/P&gt;&lt;P&gt;I have doubt in Hash register file which is mentioned in the trust architecture module in IMXRT1170&lt;/P&gt;&lt;P&gt;1.what is Hash register file?&lt;/P&gt;&lt;P&gt;2.where(From which address or register) can I read Hash register file content?&lt;/P&gt;&lt;P&gt;please find the attached image&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="aravindD_0-1673869381994.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/207457i85A7A1F91A3F280E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="aravindD_0-1673869381994.png" alt="aravindD_0-1673869381994.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in Advance&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 16 Jan 2023 11:43:13 GMT</pubDate>
    <dc:creator>aravindD</dc:creator>
    <dc:date>2023-01-16T11:43:13Z</dc:date>
    <item>
      <title>Run Time integrity check(RTIC) in SBL and SFW for iMXRT1170</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1582413#M23284</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am using IMXRT1170 board, Need to configure RTIC for Secure bootloader.&lt;/P&gt;&lt;P&gt;&amp;nbsp;can you please tell me how to enable RTIC ?&lt;/P&gt;&lt;P&gt;and share me&amp;nbsp; bare metal or Free RTOS&amp;nbsp; environment sample code for my reference.&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 13 Jan 2023 10:36:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1582413#M23284</guid>
      <dc:creator>aravindD</dc:creator>
      <dc:date>2023-01-13T10:36:30Z</dc:date>
    </item>
    <item>
      <title>Re: Run Time integrity check(RTIC) in SBL and SFW for iMXRT1170</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1582646#M23289</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/211206"&gt;@aravindD&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;You can find all the necessary information to enable and configure RTIC on the &lt;A href="https://www.nxp.com/webapp/sps/download/mod_download.jsp?colCode=IMXRT1170SRM&amp;amp;appType=moderated" target="_self"&gt;Security Reference Manual for the i.MX RT1170 Processor&lt;/A&gt;. As for example codes, I'm afraid we do not have any, but the SRM should be good reference. Sorry for the inconvenience this may cause.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR,&lt;/P&gt;
&lt;P&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Fri, 13 Jan 2023 21:31:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1582646#M23289</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2023-01-13T21:31:53Z</dc:date>
    </item>
    <item>
      <title>Re: Run Time integrity check(RTIC) in SBL and SFW for iMXRT1170</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1583151#M23301</link>
      <description>&lt;P&gt;Thank you for reply,&lt;/P&gt;&lt;P&gt;I have doubt in Hash register file which is mentioned in the trust architecture module in IMXRT1170&lt;/P&gt;&lt;P&gt;1.what is Hash register file?&lt;/P&gt;&lt;P&gt;2.where(From which address or register) can I read Hash register file content?&lt;/P&gt;&lt;P&gt;please find the attached image&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="aravindD_0-1673869381994.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/207457i85A7A1F91A3F280E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="aravindD_0-1673869381994.png" alt="aravindD_0-1673869381994.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in Advance&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 16 Jan 2023 11:43:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1583151#M23301</guid>
      <dc:creator>aravindD</dc:creator>
      <dc:date>2023-01-16T11:43:13Z</dc:date>
    </item>
    <item>
      <title>Re: Run Time integrity check(RTIC) in SBL and SFW for iMXRT1170</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1583353#M23303</link>
      <description>&lt;P&gt;I'm unable to share much more information about the SRM due to its confidential nature, and I must politely ask you to follow suit. If you wish to go more in depth about topics from the SRM, please enter a ticket on our&amp;nbsp;&lt;A href="https://support.nxp.com/s/?language=en_US" target="_self"&gt;support portal here&lt;/A&gt;&amp;nbsp;rather than using NXP community.&lt;/P&gt;
&lt;P&gt;That said, I Section&amp;nbsp;6.13.160 of the SRM will prove to be very useful for your inquiry.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR,&lt;/P&gt;
&lt;P&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Mon, 16 Jan 2023 17:20:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Run-Time-integrity-check-RTIC-in-SBL-and-SFW-for-iMXRT1170/m-p/1583353#M23303</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2023-01-16T17:20:30Z</dc:date>
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