RT 1176 LPADC Problem

ywjack — Wed, 02 Nov 2022 01:16:15 GMT

Hi：NXP TechSupport，I had a similar problem，I used the ADC1 [N13] GPIO_AD_06 CHANNEL0 and [P17] GPIO_AD_12 CHANNEL3 of the LPADC module, and I found that the ADC value of CHANNEL0 is correct, and the ADC value of CHANNEL3 is always 4095. But I'm using SDK_2_12_1_MIMXRT1170-EVK.zip SDK, so I think there may be something wrong with my configuration. Could you please help me check it

Here is my configuration

const lpadc_config_t LPADC1_config = {
.enableInDozeMode = true,
.enableAnalogPreliminary = false,
.powerUpDelay = 0x80UL,
.referenceVoltageSource = kLPADC_ReferenceVoltageAlt2,
.powerLevelMode = kLPADC_PowerLevelAlt1,
.triggerPriorityPolicy = kLPADC_TriggerPriorityPreemptImmediately,
.enableConvPause = false,
.convPauseDelay = 0UL,
.FIFOWatermark = 0UL,
};
lpadc_conv_command_config_t LPADC1_commandsConfig[2] = {
{
.sampleScaleMode = kLPADC_SampleFullScale,
.sampleChannelMode = kLPADC_SampleChannelSingleEndSideA,
.channelNumber = 0U,
.chainedNextCommandNumber = 2,
.enableAutoChannelIncrement = false,
.loopCount = 0UL,
.hardwareAverageMode = kLPADC_HardwareAverageCount1,
.sampleTimeMode = kLPADC_SampleTimeADCK3,
.hardwareCompareMode = kLPADC_HardwareCompareDisabled,
.hardwareCompareValueHigh = 0UL,
.hardwareCompareValueLow = 0UL,
},
{
.sampleScaleMode = kLPADC_SampleFullScale,
.sampleChannelMode = kLPADC_SampleChannelSingleEndSideA,
.channelNumber = 3U,
.chainedNextCommandNumber = 0,
.enableAutoChannelIncrement = false,
.loopCount = 0UL,
.hardwareAverageMode = kLPADC_HardwareAverageCount1,
.sampleTimeMode = kLPADC_SampleTimeADCK3,
.hardwareCompareMode = kLPADC_HardwareCompareDisabled,
.hardwareCompareValueHigh = 0UL,
.hardwareCompareValueLow = 0UL,
}
};
lpadc_conv_trigger_config_t LPADC1_triggersConfig[2] = {
{
.targetCommandId = 1,
.delayPower = 0UL,
.priority = 1,
.enableHardwareTrigger = true
},
{
.targetCommandId = 2,
.delayPower = 0UL,
.priority = 1,
.enableHardwareTrigger = false
}
};

static void LPADC1_init(void) {
/* Initialize LPADC converter */
LPADC_Init(LPADC1_PERIPHERAL, &LPADC1_config);
/* Configure conversion command 1. */
LPADC_SetConvCommandConfig(LPADC1_PERIPHERAL, 1, &LPADC1_commandsConfig[0]);
/* Configure conversion command 2. */
LPADC_SetConvCommandConfig(LPADC1_PERIPHERAL, 2, &LPADC1_commandsConfig[1]);
/* Configure trigger 0. */
LPADC_SetConvTriggerConfig(LPADC1_PERIPHERAL, 0, &LPADC1_triggersConfig[0]);
/* Configure trigger 1. */
LPADC_SetConvTriggerConfig(LPADC1_PERIPHERAL, 1, &LPADC1_triggersConfig[1]);
/* Interrupt vector ADC1_IRQn priority settings in the NVIC. */
NVIC_SetPriority(LPADC1_IRQN, LPADC1_IRQ_PRIORITY);
/* Enable interrupts from LPADC */
LPADC_EnableInterrupts(LPADC1_PERIPHERAL, (kLPADC_FIFOWatermarkInterruptEnable));
/* Enable interrupt ADC1_IRQn request in the NVIC. */
EnableIRQ(LPADC1_IRQN);
}

void DEMO_LPADC_IRQ_HANDLER_FUNC(void)
{
#if 0
ADC_ETC_ClearInterruptStatusFlags(DEMO_ADC_ETC_BASE, kADC_ETC_Trg0TriggerSource, kADC_ETC_Done0StatusFlagMask);
g_AdcConversionDoneFlag = true;
/* Get result from the trigger source chain 0. */
g_AdcConversionValue[0] = ADC_ETC_GetADCConversionValue(DEMO_ADC_ETC_BASE, DEMO_ADC_ETC_TRIGGER_GROUP, 0U);
g_AdcConversionValue[1] = ADC_ETC_GetADCConversionValue(DEMO_ADC_ETC_BASE, DEMO_ADC_ETC_TRIGGER_GROUP, 3U);
__DSB();
#else
g_LpadcInterruptCounter++;
#if (defined(FSL_FEATURE_LPADC_FIFO_COUNT) && (FSL_FEATURE_LPADC_FIFO_COUNT == 2U))
if (LPADC_GetConvResult(DEMO_LPADC_BASE, &g_LpadcResultConfigStruct, 0U))
#else
if (LPADC_GetConvResult(DEMO_LPADC_BASE, &g_LpadcResultConfigStruct))
#endif /* FSL_FEATURE_LPADC_FIFO_COUNT */
{
g_LpadcConversionCompletedFlag = true;
}
SDK_ISR_EXIT_BARRIER;
#endif
}

int main(void)
{
uint32_t pwmVal = 4;
/* Board pin, clock, debug console init */
BOARD_ConfigMPU();
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
/* Print a note to terminal. */

while (1)
{
SDK_DelayAtLeastUs(100000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
LPADC_DoSoftwareTrigger(DEMO_LPADC_BASE, 1U); /* 1U is trigger0 mask. */

}

Re: RT 1176 LPADC Problem

Pavel_Hernandez — Thu, 03 Nov 2022 22:24:41 GMT

Hello,

In order to get the same environment of your code tells me, what kind of example are you using? I will try on my side. Is ADC1 Channel 3 not working?

Best regards,
Pavel

Re: RT 1176 LPADC Problem

ywjack — Fri, 04 Nov 2022 00:49:53 GMT

https://community.nxp.com/t5/i-MX-RT/ADC-ETC-CFG-Problem/m-p/1548202#M22343

I have attached my code project below this link, sorry that I should not have wasted your resources by consulting different technical support on this issue, sorry (because I can't get it out, about ADC1A_CH3(P17)) he always read 4095, I think there is something wrong with my configuration

Re: RT 1176 LPADC Problem

Pavel_Hernandez — Wed, 09 Nov 2022 00:02:03 GMT

Hello,

Let me get that board and when I have more information, I will contact you.

Best regards,
Pavel

Re: RT 1176 LPADC Problem

Pavel_Hernandez — Tue, 15 Nov 2022 03:27:51 GMT

Hello,

I think I did reproduce the same issue let me do a report, when I have more information, I will contact you.

Best regards,
Pavel

Re: RT 1176 LPADC Problem

Pavel_Hernandez — Tue, 15 Nov 2022 04:19:03 GMT

Hello,

I desist to make the report I review the schematic, are you using the EVK? let me show why the ADC1_3 is not available on the board.

Is using as input for the ENET interface.

Best regards,
Pavel

Re: RT 1176 LPADC Problem

ywjack — Tue, 15 Nov 2022 11:10:43 GMT

I do not use the DEMO board of NXP EVK. I use the LAYOUT board of my company.

Re: RT 1176 LPADC Problem

Pavel_Hernandez — Tue, 15 Nov 2022 21:52:59 GMT

Hello,

Sorry for the late response, unfortunately, I can't reproduce the problem because the board doesn't have the pin available, I recommend using the example and making modifications just to test if the Channel 3 pin has the same behavior, for the purpose of ruling out the problem hardware.

Best regards,
Pavel

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