FLEXSPI Bus Clock Issue

mjpovi — Thu, 22 Sep 2022 02:45:57 GMT

Hi,

I'm using FLEXPI to connect to a NOR Flash device. I'm clocking the FLEXSPI at 132 MHz and 99 MHz, depending on clock divider (3 or 4), being driven by PLL2_PFD2_CLK (see settings, below).

My issue is that while the chip select waveform appears "okay" the SCLK and data lines do not appear to be driven very well, and I've tried the 100 MHz, 150 MHz, and 200MHz and speeds and all the drive-strength settings without success. The only way I am successfull using the FLEXPI is to reduce the FLEXSPI clock to 99 MHz or slower.

I don't think that the clock and data lines are being driven successfully, except maybe for the SS0/Chip Select. Can you recommend some settings to try or might I have an issue with the external bus H/W ?

pim_mux

IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U);

IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 0x10E1U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10E1U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10E1U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10E1U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10E1U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10E1U);

///////////////////////////////////////////////////////////////////////////

/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 2);

//////////////////////////////////////////////////////////////////////////////////

clock_config

/* Init System PLL. */

CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);

/////////////////////////////////////////////////////////////////////////////

Re: FLEXSPI Bus Clock Issue

jeremyzhou — Thu, 22 Sep 2022 06:06:08 GMT

Hi @mjpovi ,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
To provide the fastest support, please follow the below advice to modify the hardware board and test.,
1) It is recommended to left FLEXSPI_A_DQS（GPIO_SD_B1_05）pin floating;
2) It is also recommend to pull-up QSPI flash
#S and HOLD pins to make sure QSPI Flash boot up stability.
3) Using the tool to contact the board.
Have a great day,
TIC

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