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    <title>topic RT1160 Boot Procedure in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1491705#M20687</link>
    <description>&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;We are using a development board MIMXRT 1160-EVK.&lt;/P&gt;&lt;P&gt;on the board, we have a QSPI NOR flash of 64MB.&lt;/P&gt;&lt;P&gt;we would like to know:&lt;/P&gt;&lt;P&gt;1. After burning an image to the QSPI flash (via MCUXpresso IDE), how does the card boots?&lt;/P&gt;&lt;P&gt;2. Does it run from the flash? isn't it slow? because every instruction needs to be read from the flash memory on QSPI interface.&lt;/P&gt;&lt;P&gt;3. do we need an external RAM on board to run application?&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Sun, 24 Jul 2022 08:00:54 GMT</pubDate>
    <dc:creator>andreytarakin</dc:creator>
    <dc:date>2022-07-24T08:00:54Z</dc:date>
    <item>
      <title>RT1160 Boot Procedure</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1491705#M20687</link>
      <description>&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;We are using a development board MIMXRT 1160-EVK.&lt;/P&gt;&lt;P&gt;on the board, we have a QSPI NOR flash of 64MB.&lt;/P&gt;&lt;P&gt;we would like to know:&lt;/P&gt;&lt;P&gt;1. After burning an image to the QSPI flash (via MCUXpresso IDE), how does the card boots?&lt;/P&gt;&lt;P&gt;2. Does it run from the flash? isn't it slow? because every instruction needs to be read from the flash memory on QSPI interface.&lt;/P&gt;&lt;P&gt;3. do we need an external RAM on board to run application?&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 24 Jul 2022 08:00:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1491705#M20687</guid>
      <dc:creator>andreytarakin</dc:creator>
      <dc:date>2022-07-24T08:00:54Z</dc:date>
    </item>
    <item>
      <title>Re: RT1170 Boot Procedure</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1493044#M20725</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/63371"&gt;@andreytarakin&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;1. Please set the board to internal boot mode. Please refer to AN12107 and AN12108.&lt;/P&gt;
&lt;P&gt;2. RT1160 will boot from internal ROM bootloader. Then configure the FlexSPI to support XIP. At last, jump to the application in NOR flash. You can refer to AN12437 to see the performance of FlexSPI.&lt;/P&gt;
&lt;P&gt;3. It's up to your application. RT1160 has 1M SRAM.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
      <pubDate>Thu, 21 Jul 2022 06:16:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1493044#M20725</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2022-07-21T06:16:13Z</dc:date>
    </item>
    <item>
      <title>Re: RT1170 Boot Procedure</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1494353#M20773</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;this is the memory configuration on our board:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="andreytarakin_0-1658649421004.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187609i52975079D1BE7F73/image-size/medium?v=v2&amp;amp;px=400" role="button" title="andreytarakin_0-1658649421004.png" alt="andreytarakin_0-1658649421004.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;andreytarakin_0-1658649421004.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;There is no 1MB RAM here. Is there some memory configuration we are missing?&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Andrey&lt;/P&gt;</description>
      <pubDate>Sun, 24 Jul 2022 07:58:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1494353#M20773</guid>
      <dc:creator>andreytarakin</dc:creator>
      <dc:date>2022-07-24T07:58:43Z</dc:date>
    </item>
    <item>
      <title>Re: RT1170 Boot Procedure</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1494372#M20774</link>
      <description>&lt;P&gt;The 1 Megabyte is the sum of all on chip memories (DTCM, ITCM, OCRAM). You should place all performance critical code to ITCM.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;“because every instruction needs to be read from the flash memory on QSPI interface.”&amp;nbsp; The FlexSPI Interface has a prefetch buffer and the Core uses caches. This helps to keep the performance up even if the memory is slow.&lt;/P&gt;</description>
      <pubDate>Sun, 24 Jul 2022 15:45:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT1160-Boot-Procedure/m-p/1494372#M20774</guid>
      <dc:creator>Masmiseim</dc:creator>
      <dc:date>2022-07-24T15:45:34Z</dc:date>
    </item>
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