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    <title>i.MX RT Crossover MCUsのトピックRe: How to avoid setting one PWM active in complementary PWM mode before the first cycle?</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1476705#M20186</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I appologize for the delay.&lt;/P&gt;
&lt;P&gt;Because I have been&amp;nbsp; working now at home for Convid-19, I can not test the PWM signals because of lack of resistor on the R278 and R280 on the EVK board.&lt;/P&gt;
&lt;P&gt;How about putting the function PWMSigPin after the PWM module have started?&lt;/P&gt;
&lt;P&gt;void BOARD_InitPins(void) {&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Iomuxc);&lt;/P&gt;
&lt;P&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); &lt;BR /&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); &lt;BR /&gt;&lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U); &lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U); &lt;BR /&gt;&lt;BR /&gt;}&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;void PWMSigPin(void)&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;CLOCK_EnableClock(kCLOCK_Iomuxc);&lt;/P&gt;
&lt;P&gt;OMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWMA01, 0U); &lt;BR /&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWMB01, 0U);&lt;/P&gt;
&lt;P&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWMA01, 0x30B0U); &lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWMB01, 0x30B0U);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
    <pubDate>Mon, 20 Jun 2022 10:03:10 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2022-06-20T10:03:10Z</dc:date>
    <item>
      <title>How to avoid setting one PWM active in complementary PWM mode before the first cycle?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1467986#M19888</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;When using eFlexPWM in complementary mode, setting the OUTEN bits immediately sets PWM B to high (active) before even setting the LDOK bit or starting the timer. Here is an example of running just the PWM_SetupPwm() function which sets OUTEN bits at the end and without PWM_SetPwmLdok() and PWM_StartTimer() functions:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="after_ldok.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182034i54327B2268B4FA86/image-size/medium?v=v2&amp;amp;px=400" role="button" title="after_ldok.png" alt="after_ldok.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This results in PWM B being high before the first cycle starts. I uploaded a slightly modified PWM example from the SDK for MIMXRT1060-EVKB so you can easily test this yourself. This effect might be unnoticeable in lower PWM frequencies, but it is a big problem in higher frequencies (700Khz is set in the attached files). Here is a screenshot of the problem:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="first_cylcle_original.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182035iDB9A2D49B92B6933/image-size/medium?v=v2&amp;amp;px=400" role="button" title="first_cylcle_original.png" alt="first_cylcle_original.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;PWM B (red) is high for a relatively long time before the first cycle of PWM A (blue) which is undesired behavior for our application. I managed to slightly reduce this problem by commenting out the OUTEN line in PWM_SetupPwm() and adding it just before PWM_StartTimer(). Here is the result:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="enable_after_ldok.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182036i3BF61127521DD0C4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="enable_after_ldok.png" alt="enable_after_ldok.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;However, PWM B is still active before the first cycle, the time is just shorter because the operations were rearranged. I tried setting the OUTEN bits after starting the timer, but this enables the PWM outputs when the timer is already running, so they start at a random time of their cycle:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="after_start_timer.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182039i5C77ECBE42F30967/image-size/medium?v=v2&amp;amp;px=400" role="button" title="after_start_timer.png" alt="after_start_timer.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is the PWM B going high when setting the OUTEN bits (before LDOK and starting the timer) expected behavior? Is there any way to avoid it going high and have the complementary PWM start properly?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 02 Jun 2022 05:55:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1467986#M19888</guid>
      <dc:creator>PseudoCircuit</dc:creator>
      <dc:date>2022-06-02T05:55:00Z</dc:date>
    </item>
    <item>
      <title>Re: How to avoid setting one PWM active in complementary PWM mode before the first cycle?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1469725#M19963</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I have checked your code, as you have changed the PWM driver, I think you have the following issue.&lt;/P&gt;
&lt;P&gt;You have to use the original code to initialize kPWM_Module_0, kPWM_Module_1,kPWM_Module_2 independently, the code can not be changed, otherwise, the synchronization among three module has problem.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;/* Use full cycle reload */&lt;BR /&gt;pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle;&lt;BR /&gt;/* PWM A &amp;amp; PWM B form a complementary PWM pair */&lt;BR /&gt;pwmConfig.pairOperation = kPWM_ComplementaryPwmA;&lt;BR /&gt;pwmConfig.enableDebugMode = true;&lt;/P&gt;
&lt;P&gt;/* Initialize submodule 0 */&lt;BR /&gt;if (PWM_Init(BOARD_PWM_BASEADDR, kPWM_Module_0, &amp;amp;pwmConfig) == kStatus_Fail)&lt;BR /&gt;{&lt;BR /&gt;PRINTF("PWM initialization failed\n");&lt;BR /&gt;return 1;&lt;BR /&gt;}&lt;/P&gt;
&lt;P&gt;/* Initialize submodule 1 */&lt;BR /&gt;pwmConfig.clockSource = kPWM_Submodule0Clock;&lt;BR /&gt;pwmConfig.initializationControl = kPWM_Initialize_MasterSync;&lt;BR /&gt;if (PWM_Init(BOARD_PWM_BASEADDR, kPWM_Module_1, &amp;amp;pwmConfig) == kStatus_Fail)&lt;BR /&gt;{&lt;BR /&gt;PRINTF("PWM initialization failed\n");&lt;BR /&gt;return 1;&lt;BR /&gt;}&lt;/P&gt;
&lt;P&gt;/* Initialize submodule 2 the same way as submodule 1 */&lt;BR /&gt;if (PWM_Init(BOARD_PWM_BASEADDR, kPWM_Module_2, &amp;amp;pwmConfig) == kStatus_Fail)&lt;BR /&gt;{&lt;BR /&gt;PRINTF("PWM initialization failed\n");&lt;BR /&gt;return 1;&lt;BR /&gt;}&lt;/P&gt;
&lt;P&gt;Secondly, I think it is okay to delete the base-&amp;gt;OUTEN line in&amp;nbsp; PWM_SetupPwm() function, and add the base-&amp;gt;OUTEN&amp;nbsp; line after the PWM_StartTimer() in main.&lt;/P&gt;
&lt;P&gt;Pls have a try&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jun 2022 05:59:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1469725#M19963</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2022-06-07T05:59:38Z</dc:date>
    </item>
    <item>
      <title>Re: How to avoid setting one PWM active in complementary PWM mode before the first cycle?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1472298#M20067</link>
      <description>&lt;P&gt;I tried using the original code, but this doesn't help to fix the issue, and I'm only using one module so synchronization between different modules does not seem relevant here. I uploaded the original PWM example from SDK, with the only change being removed clock dividers (use max available 150Mhz bus for PWM), reduced dead time and increased PWM frequency to 600khz. This is the output on PWM1 Submodule 0 pins A and B:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="first_cycle_unmodified_example.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183009i56555143CF11B6A7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="first_cycle_unmodified_example.png" alt="first_cycle_unmodified_example.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; As you can see the issue is still very apparent.&lt;/P&gt;</description>
      <pubDate>Fri, 10 Jun 2022 14:32:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1472298#M20067</guid>
      <dc:creator>PseudoCircuit</dc:creator>
      <dc:date>2022-06-10T14:32:20Z</dc:date>
    </item>
    <item>
      <title>Re: How to avoid setting one PWM active in complementary PWM mode before the first cycle?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1476705#M20186</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I appologize for the delay.&lt;/P&gt;
&lt;P&gt;Because I have been&amp;nbsp; working now at home for Convid-19, I can not test the PWM signals because of lack of resistor on the R278 and R280 on the EVK board.&lt;/P&gt;
&lt;P&gt;How about putting the function PWMSigPin after the PWM module have started?&lt;/P&gt;
&lt;P&gt;void BOARD_InitPins(void) {&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Iomuxc);&lt;/P&gt;
&lt;P&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); &lt;BR /&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); &lt;BR /&gt;&lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U); &lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U); &lt;BR /&gt;&lt;BR /&gt;}&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;void PWMSigPin(void)&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;CLOCK_EnableClock(kCLOCK_Iomuxc);&lt;/P&gt;
&lt;P&gt;OMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWMA01, 0U); &lt;BR /&gt;IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWMB01, 0U);&lt;/P&gt;
&lt;P&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWMA01, 0x30B0U); &lt;BR /&gt;IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWMB01, 0x30B0U);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Mon, 20 Jun 2022 10:03:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/How-to-avoid-setting-one-PWM-active-in-complementary-PWM-mode/m-p/1476705#M20186</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2022-06-20T10:03:10Z</dc:date>
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