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    <title>topic Re: SDRAM usage and data corruption in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472803#M20089</link>
    <description>&lt;P&gt;Hi,&lt;BR /&gt;Thanks for your reply.&lt;BR /&gt;For instance, you can move the memp_memory_PBUF_POOL_base object to the SDRAM after the below configuration.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremyzhou_0-1655113514621.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183103iAEB12E1B522CD748/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremyzhou_0-1655113514621.png" alt="jeremyzhou_0-1655113514621.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremyzhou_1-1655113540015.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183104iA966FE4F8684FE47/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremyzhou_1-1655113540015.png" alt="jeremyzhou_1-1655113540015.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
    <pubDate>Mon, 13 Jun 2022 09:45:49 GMT</pubDate>
    <dc:creator>jeremyzhou</dc:creator>
    <dc:date>2022-06-13T09:45:49Z</dc:date>
    <item>
      <title>SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1470940#M20017</link>
      <description>&lt;P&gt;Hi Gents,&lt;/P&gt;&lt;P&gt;&amp;nbsp;I'm trying to use the starting region of SDRAM (it runs from 0x81000000 to 0x82000000). And I use XiP flash so application code does not run out of SDRAM. Heap is located at the end of SDRAM. My config is as seen below.&lt;BR /&gt;&lt;BR /&gt;My issue is that I experience data going corrupt if I use space below 0x81000000 (e.g., at 0x80800000). Based on my config would one expect memory overlap corruption issues???&lt;BR /&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="daad (1).png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182662iD1761DE9C47BD295/image-size/large?v=v2&amp;amp;px=999" role="button" title="daad (1).png" alt="daad (1).png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182664iA9C7FF311024289B/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled.png" alt="Untitled.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Jun 2022 20:02:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1470940#M20017</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-08T20:02:12Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1470970#M20018</link>
      <description>&lt;P&gt;My board.c lists two regions with the same base address (as used by SDRAM). Region 8 is what I expected. But why is there a Region1 specified at the same address???&lt;BR /&gt;&lt;BR /&gt;/* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */&lt;BR /&gt;MPU-&amp;gt;RBAR = ARM_MPU_RBAR(1, 0x80000000U);&lt;BR /&gt;MPU-&amp;gt;RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;/* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */&lt;BR /&gt;MPU-&amp;gt;RBAR = ARM_MPU_RBAR(8, 0x80000000U);&lt;BR /&gt;MPU-&amp;gt;RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Jun 2022 20:23:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1470970#M20018</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-08T20:23:03Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1471093#M20021</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;1) My issue is that I experience data going corrupt if I use space below 0x81000000 (e.g., at 0x80800000). Based on my config would one expect memory overlap corruption issues???&lt;BR /&gt;-- No, I don't think so.&lt;BR /&gt;2) But why is there a Region1 specified at the same address???&lt;BR /&gt;-- The newest configuration will the affect region finally, and the region 1 setting is used to set the attribute of the memories that are not targeted for any specific purposes, to assure their attaribute is certain.&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Thu, 09 Jun 2022 01:35:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1471093#M20021</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2022-06-09T01:35:54Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1471932#M20054</link>
      <description>&lt;P&gt;Hi，&lt;BR /&gt;Thanks for your reply.&lt;BR /&gt;I think you'd better tell me what exactly LWIP demo you want to discuss.&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Fri, 10 Jun 2022 03:01:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1471932#M20054</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2022-06-10T03:01:12Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472391#M20069</link>
      <description>&lt;P&gt;Well, my issue is related to LWIP across any of the demos...&amp;nbsp;&lt;/P&gt;&lt;P&gt;From mem.c, this specifies LWIP heap usage. And I can move to SDRAM (0x8xxxxxxxx) if needed to free up SRAM_DTC:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;#ifndef LWIP_RAM_HEAP_POINTER&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;/** the heap. we need one struct mem at the end and some room for alignment */&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;LWIP_DECLARE_MEMORY_ALIGNED(ram_heap, MEM_SIZE_ALIGNED + (2U * SIZEOF_STRUCT_MEM));&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;#define LWIP_RAM_HEAP_POINTER ram_heap&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;But I still see LWIP allocating a lot of stack when I examine the image. How do I move memp_memory_PBUF_POOL_base ?&lt;BR /&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183032i5DEA7164FD6D7E89/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled.png" alt="Untitled.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 10 Jun 2022 19:29:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472391#M20069</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-10T19:29:48Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472803#M20089</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Thanks for your reply.&lt;BR /&gt;For instance, you can move the memp_memory_PBUF_POOL_base object to the SDRAM after the below configuration.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremyzhou_0-1655113514621.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183103iAEB12E1B522CD748/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremyzhou_0-1655113514621.png" alt="jeremyzhou_0-1655113514621.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremyzhou_1-1655113540015.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/183104iA966FE4F8684FE47/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremyzhou_1-1655113540015.png" alt="jeremyzhou_1-1655113540015.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jun 2022 09:45:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472803#M20089</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2022-06-13T09:45:49Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472890#M20091</link>
      <description>&lt;P&gt;In the linker script configuration? Sorry, haven't done much memory map config in here yet. So I need a bit more guidance.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jun 2022 13:07:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472890#M20091</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-13T13:07:09Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472900#M20092</link>
      <description>&lt;P&gt;Is there something I can change in memp_std.h to move PBUF_POOL?&lt;/P&gt;&lt;P&gt;/&lt;EM&gt;*&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;* A list of pools of pbuf's used by LWIP.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;*&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;* LWIP_PBUF_MEMPOOL(pool_name, number_elements, pbuf_payload_size, pool_description)&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;* creates a pool name MEMP_pool_name. description is used in stats.c&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;* This allocates enough space for the pbuf struct and a payload.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;* (Example: pbuf_payload_size=0 allocates only size for the struct)&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;*/&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;LWIP_MEMPOOL(PBUF, MEMP_NUM_PBUF, sizeof(struct pbuf), "PBUF_REF/ROM")&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;LWIP_PBUF_MEMPOOL(PBUF_POOL, PBUF_POOL_SIZE, PBUF_POOL_BUFSIZE, "PBUF_POOL")&lt;/EM&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jun 2022 13:27:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472900#M20092</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-13T13:27:44Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM usage and data corruption</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472975#M20094</link>
      <description>&lt;P&gt;The macros for this really telescope... trying to follow them down. I see this comment below. Should I be doing this? The NXP port of LWIP doesn't seem to have cc.h ...???&lt;BR /&gt;&lt;BR /&gt;/**&lt;BR /&gt;* @ingroup mempool&lt;BR /&gt;* Declare a private memory pool&lt;BR /&gt;* Private mempools example:&lt;BR /&gt;* .h: only when pool is used in multiple .c files: LWIP_MEMPOOL_PROTOTYPE(my_private_pool);&lt;BR /&gt;* .c:&lt;BR /&gt;* - in global variables section: LWIP_MEMPOOL_DECLARE(my_private_pool, 10, sizeof(foo), "Some description")&lt;BR /&gt;* - call ONCE before using pool (e.g. in some init() function): LWIP_MEMPOOL_INIT(my_private_pool);&lt;BR /&gt;* - allocate: void* my_new_mem = LWIP_MEMPOOL_ALLOC(my_private_pool);&lt;BR /&gt;* - free: LWIP_MEMPOOL_FREE(my_private_pool, my_new_mem);&lt;BR /&gt;*&lt;BR /&gt;* &lt;STRONG&gt;To relocate a pool, declare it as extern in cc.h. Example for GCC:&lt;/STRONG&gt;&lt;BR /&gt;* extern u8_t \_\_attribute\_\_((section(".onchip_mem"))) memp_memory_my_private_pool_base[];&lt;BR /&gt;*/&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jun 2022 15:14:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-usage-and-data-corruption/m-p/1472975#M20094</guid>
      <dc:creator>mspenard603</dc:creator>
      <dc:date>2022-06-13T15:14:26Z</dc:date>
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