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    <title>topic RT106x memory allocation in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT106x-memory-allocation/m-p/1456484#M19519</link>
    <description>&lt;P&gt;Hello team,&lt;/P&gt;&lt;P&gt;my customer plans to work with RT1064 and he needs a lot of RAM for his application.&lt;/P&gt;&lt;P&gt;1. Can you please advise how to perform a memory allocation from 2 different memories?&lt;/P&gt;&lt;P&gt;2. What is the difference between the RAM type ITC and OC?&lt;/P&gt;&lt;P&gt;Waiting for your kind feedback, Thanks a lot.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Shai&lt;/P&gt;</description>
    <pubDate>Wed, 11 May 2022 14:05:36 GMT</pubDate>
    <dc:creator>shai_b</dc:creator>
    <dc:date>2022-05-11T14:05:36Z</dc:date>
    <item>
      <title>RT106x memory allocation</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT106x-memory-allocation/m-p/1456484#M19519</link>
      <description>&lt;P&gt;Hello team,&lt;/P&gt;&lt;P&gt;my customer plans to work with RT1064 and he needs a lot of RAM for his application.&lt;/P&gt;&lt;P&gt;1. Can you please advise how to perform a memory allocation from 2 different memories?&lt;/P&gt;&lt;P&gt;2. What is the difference between the RAM type ITC and OC?&lt;/P&gt;&lt;P&gt;Waiting for your kind feedback, Thanks a lot.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Shai&lt;/P&gt;</description>
      <pubDate>Wed, 11 May 2022 14:05:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT106x-memory-allocation/m-p/1456484#M19519</guid>
      <dc:creator>shai_b</dc:creator>
      <dc:date>2022-05-11T14:05:36Z</dc:date>
    </item>
    <item>
      <title>Re: RT106x memory allocation</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT106x-memory-allocation/m-p/1456558#M19521</link>
      <description>&lt;P&gt;Hi&lt;BR /&gt;&lt;BR /&gt;See section 11 of &lt;A href="https://www.utasker.com/docs/iMX/i.MX_RT_1064_uTasker.pdf" target="_blank"&gt;https://www.utasker.com/docs/iMX/i.MX_RT_1064_uTasker.pdf&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;ITC/DTC are closely coupled and operate without cache and with zero wait states - they can be allocated in 32kByte banks for instruction and data use to get optimal performance.&lt;BR /&gt;&lt;BR /&gt;OC is slower but has caching option. There is a fixed 512k block of this in the 1064 and there is also the option to allocate 32k banks of FlexRAM to OC instead of ITC/DTC, although there is rarely an advantage of doing that (best use FlexRAM for ITC/DTC and not OC).&lt;/P&gt;&lt;P&gt;The fixed 512k OC memory is also practical for eLCD applications since it has enough space to hold 2 frame buffers for medium sized displays in 16 but color mode (without needing SDRAM and removing any external memory access)&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 11 May 2022 15:59:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/RT106x-memory-allocation/m-p/1456558#M19521</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2022-05-11T15:59:41Z</dc:date>
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