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    <title>topic Re: Route DMA Done signal through XBAR1 in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1402203#M18047</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126939"&gt;@glaukos&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;You can test this on xbara example in SDK. Merge a DMA example in it.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;    XBARA_Init(DEMO_XBARA_BASEADDR);

    /* Configure the XBARA signal connections. */
    XBARA_SetSignalsConnection(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_INPUT, DEMO_XBARA_USER_CHANNEL_OUTPUT);

    /* Configure the XBARA interrupt. */
    xbaraConfig.activeEdge  = kXBARA_EdgeRising;
    xbaraConfig.requestType = kXBARA_RequestDMAEnable;
    XBARA_SetOutputSignalConfig(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_OUTPUT, &amp;amp;xbaraConfig);

    xbaraConfig.requestType = kXBARA_RequestInterruptEnalbe;
    XBARA_SetSignalsConnection(DEMO_XBARA_BASEADDR, kXBARA1_InputDmaDone0, kXBARA1_OutputDmaChMuxReq94);
    XBARA_SetOutputSignalConfig(DEMO_XBARA_BASEADDR, kXBARA1_OutputDmaChMuxReq94, &amp;amp;xbaraConfig);
    /* Enable at the NVIC. */
//    EnableIRQ(DEMO_XBARA_IRQn);
    EnableIRQ(XBAR1_IRQ_2_3_IRQn);&lt;/LI-CODE&gt;
&lt;P&gt;Be careful that&amp;nbsp;DENn and IENn should not be set to 1 at the same time for the same&lt;BR /&gt;output XBAR_OUT[n].&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
    <pubDate>Thu, 20 Jan 2022 03:09:14 GMT</pubDate>
    <dc:creator>jingpan</dc:creator>
    <dc:date>2022-01-20T03:09:14Z</dc:date>
    <item>
      <title>Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1395724#M17899</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to route a DMA_DONE signal through the Crossbar on a RT1064. The Crossbar has 8 DMA_DONE inputs (XBAR1_IN64 to XBAR1_IN71) named DMA_DONE0 to DMA_DONE7.&lt;/P&gt;&lt;P&gt;However, this MCU has 32 DMA channels. How are these 32 channels mapped to 8 DONE signals? I can't find anything about that in the documentation.&lt;/P&gt;&lt;P&gt;Second, does the DMA_DONE signal reflect the state of the DONE flag in the CSR register of the TCD?&lt;/P&gt;&lt;P&gt;Third, I am routing the XBAR signal to a show pin:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputDmaDone2, XBARA1_OutputIomuxXbarInout11);&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;and have DMA channel 2 set up to trigger cyclically. However, the pin stays low. I have tried all other Done signals as well. Please help.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Jan 2022 16:30:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1395724#M17899</guid>
      <dc:creator>glaukos</dc:creator>
      <dc:date>2022-01-06T16:30:09Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1396665#M17921</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126939"&gt;@glaukos&lt;/a&gt;&amp;nbsp;,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;For each XBAR (XBARA and XBARB), the first four pins: XBAR_OUT0~3 pin all can trigger DMA requests.&amp;nbsp; Thes&lt;/SPAN&gt;&lt;SPAN&gt;e dma_done0 ~dma_done7 signals are the completing indicator of the above 8 trigger source.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Jing&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 10 Jan 2022 09:10:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1396665#M17921</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2022-01-10T09:10:43Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1399382#M17992</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/61241"&gt;@jingpan&lt;/a&gt; ,&lt;/P&gt;&lt;P&gt;thank you for your reply. Unfortunately I am still struggling to make progress.&lt;/P&gt;&lt;P&gt;XBARA has 4 connections that can trigger DMA requests. They are connected to DMAMUX channels 30, 31, 94 and 95. I can't find any references to DMAMUX channels originating from XBARB.&lt;/P&gt;&lt;P&gt;My DMA transfer is now routed through XBARA (XBARA1_OUT0) to DMAMUX channel 30, which I assume corresponds to dma_done0? However, the done signal appears to stay low.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;glaukos&lt;/P&gt;</description>
      <pubDate>Fri, 14 Jan 2022 09:07:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1399382#M17992</guid>
      <dc:creator>glaukos</dc:creator>
      <dc:date>2022-01-14T09:07:40Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1402203#M18047</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126939"&gt;@glaukos&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;You can test this on xbara example in SDK. Merge a DMA example in it.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;    XBARA_Init(DEMO_XBARA_BASEADDR);

    /* Configure the XBARA signal connections. */
    XBARA_SetSignalsConnection(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_INPUT, DEMO_XBARA_USER_CHANNEL_OUTPUT);

    /* Configure the XBARA interrupt. */
    xbaraConfig.activeEdge  = kXBARA_EdgeRising;
    xbaraConfig.requestType = kXBARA_RequestDMAEnable;
    XBARA_SetOutputSignalConfig(DEMO_XBARA_BASEADDR, DEMO_XBARA_USER_CHANNEL_OUTPUT, &amp;amp;xbaraConfig);

    xbaraConfig.requestType = kXBARA_RequestInterruptEnalbe;
    XBARA_SetSignalsConnection(DEMO_XBARA_BASEADDR, kXBARA1_InputDmaDone0, kXBARA1_OutputDmaChMuxReq94);
    XBARA_SetOutputSignalConfig(DEMO_XBARA_BASEADDR, kXBARA1_OutputDmaChMuxReq94, &amp;amp;xbaraConfig);
    /* Enable at the NVIC. */
//    EnableIRQ(DEMO_XBARA_IRQn);
    EnableIRQ(XBAR1_IRQ_2_3_IRQn);&lt;/LI-CODE&gt;
&lt;P&gt;Be careful that&amp;nbsp;DENn and IENn should not be set to 1 at the same time for the same&lt;BR /&gt;output XBAR_OUT[n].&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&lt;/P&gt;</description>
      <pubDate>Thu, 20 Jan 2022 03:09:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1402203#M18047</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2022-01-20T03:09:14Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781334#M28238</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126939"&gt;@glaukos&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;I have a similar requirement to intercept DMA done and trigger QTMR.&lt;/P&gt;&lt;P&gt;Have you succeeded in reroute the DMA done? have you figured out what is the mapping between the actual DMA channels and XBAR?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;</description>
      <pubDate>Mon, 01 Jan 2024 11:16:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781334#M28238</guid>
      <dc:creator>alonbl</dc:creator>
      <dc:date>2024-01-01T11:16:08Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781569#M28244</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225622"&gt;@alonbl&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;to be honest I don't quite remember what my conclusion was. I think at some point I figured out that DMA_DONE was not a signal originating in eDMA, and therefore does not map to the 32 DMA channels at all. The signal is rather generated by either DMAMUX or the Crossbar itself and was therefore only usable on DMA MUX channel 30, 31, 94, 95. I think there was a fixed mapping of those four channels to four of the DMA_DONE signals, although I cannot tell you what the remaining four DMA_DONE signals are mapped to.&lt;/P&gt;&lt;P&gt;In the end I realized that DMA_DONE was not helpful for my use case and I moved on to a different solution.&lt;/P&gt;&lt;P&gt;Take this information with a grain of salt, but I hope it helps.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jan 2024 08:39:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781569#M28244</guid>
      <dc:creator>glaukos</dc:creator>
      <dc:date>2024-01-02T08:39:40Z</dc:date>
    </item>
    <item>
      <title>Re: Route DMA Done signal through XBAR1</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781833#M28252</link>
      <description>&lt;P&gt;Thank you &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126939"&gt;@glaukos&lt;/a&gt; ,&lt;/P&gt;&lt;P&gt;This is helpful information.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jan 2024 21:23:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Route-DMA-Done-signal-through-XBAR1/m-p/1781833#M28252</guid>
      <dc:creator>alonbl</dc:creator>
      <dc:date>2024-01-02T21:23:28Z</dc:date>
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