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    <title>i.MX RT Crossover MCUsのトピックRe: i.mx rt1050 Interrupt Jitter</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846525#M1737</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/christiangradl"&gt;christiangradl&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;well, your interrupt latency can really depends on many factors. If you want to get the maximum speed in interrupt service routine execution you need to ensure:&lt;/P&gt;&lt;P&gt;- the stack in located in DTCM (no external SDRAM)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;- enter and exit from interrupt will take about 20ns if running at 600MHz&lt;/P&gt;&lt;P&gt;- interrupt service routine is executed from ITCM (no external QSPI even the I-CACHE enabled cannot be enough)&lt;/P&gt;&lt;P&gt;regards&lt;/P&gt;&lt;P&gt;R.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 27 Aug 2018 14:48:01 GMT</pubDate>
    <dc:creator>rastislav_pavlanin</dc:creator>
    <dc:date>2018-08-27T14:48:01Z</dc:date>
    <item>
      <title>i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846522#M1734</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;my interrupt (highest priority) jitters when i do a read from a peripheral register.&lt;/P&gt;&lt;P&gt;How can i prevent this? Does this depend on the different Busclocks?&lt;/P&gt;&lt;P&gt;Here my test code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void IRQHandler_128kHz(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; PWM2-&amp;gt;SM[0].STS = 0xFFFF;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; GPIO2-&amp;gt;DR_TOGGLE = (1UL &amp;lt;&amp;lt; 30);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Sync Out Signal&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;int main(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (1)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; myvariable = DMA0-&amp;gt;TCD[8].CITER_ELINKNO;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Read from DMA&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // myvariable = GPT1-&amp;gt;CNT;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Read from Timer&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // myvariable = LPSPI1-&amp;gt;FSR;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Read from SPI&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DMA: 90ns&lt;/P&gt;&lt;P&gt;Timer: 268 ns&lt;/P&gt;&lt;P&gt;SPI: 67 ns&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 11 Aug 2018 09:52:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846522#M1734</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-08-11T09:52:31Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846523#M1735</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;my firmware is now running and has a lot of interrupt routines/functions for USB, Ethernet, UART, LSPI, DMA, GPIO, etc.&lt;/P&gt;&lt;P&gt;The GPIO IRQ on GPIO1 (only this GPIO IRQ) =&amp;gt; GPIO1_Combined_16_31_IRQHandler has the highest level (0)&lt;/P&gt;&lt;P&gt;there are no __disable_irq(), etc. in the firmware, meaning i do not use any disabling function.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The irq function:&lt;/P&gt;&lt;P&gt;void GPIO1_Combined_16_31_IRQHandler(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp; GPIO1-&amp;gt;ISR = (1 &amp;lt;&amp;lt; 24);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; GPIO1-&amp;gt;DR ^= (1 &amp;lt;&amp;lt;&amp;nbsp; 9);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I did some measurements and use my oscilloscope therefore. The pin GPIO1.24 is connected with a frequency generator, and pin GPIO1.9 toggles the output. my oscilloscope captures both pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i start the test and do a lot of UART and USB and Ethernet communication things.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The interrupts raises up to 978 ns.&lt;/P&gt;&lt;P&gt;Very very bad. The GPIO Irq has the highest priority in my system.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So what the hell is going on here?&lt;/P&gt;&lt;P&gt;How can that be? How can i improve the irq jitter?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Aug 2018 16:32:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846523#M1735</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-08-23T16:32:55Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846524#M1736</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Below are some hints regarding the issue.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please use AN12078 (Measuring Interrupt Latency).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Fapplication-note%2FAN12078.pdf" rel="nofollow" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN12078.pdf&lt;/A&gt;&lt;SPAN&gt; &amp;gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Any software based approach to access GPIO registers is limited by internal &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;bus arbitration delays, as stated in the following Community thread&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;“RT1050-EVK GPIO fast pin toggel”&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-thread-small" data-containerid="2004" data-containertype="14" data-objectid="469064" data-objecttype="1" href="https://community.nxp.com/thread/469064"&gt;https://community.nxp.com/thread/469064&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Also, note base GPIO (IPG) clock is limited by the value of 150 MHz. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;4.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; In any case, check if in Your tests I-cache is enabled, but D-cache, concerning &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;the registers, is disabled.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Aug 2018 09:13:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846524#M1736</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-08-27T09:13:52Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846525#M1737</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/christiangradl"&gt;christiangradl&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;well, your interrupt latency can really depends on many factors. If you want to get the maximum speed in interrupt service routine execution you need to ensure:&lt;/P&gt;&lt;P&gt;- the stack in located in DTCM (no external SDRAM)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;- enter and exit from interrupt will take about 20ns if running at 600MHz&lt;/P&gt;&lt;P&gt;- interrupt service routine is executed from ITCM (no external QSPI even the I-CACHE enabled cannot be enough)&lt;/P&gt;&lt;P&gt;regards&lt;/P&gt;&lt;P&gt;R.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Aug 2018 14:48:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846525#M1737</guid>
      <dc:creator>rastislav_pavlanin</dc:creator>
      <dc:date>2018-08-27T14:48:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846526#M1738</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;i set all clocks to maxium, ref manual&amp;nbsp; table 18-4&lt;/P&gt;&lt;P&gt;my irq is already running in fast ram (between 0x00000000 - 0x00020000)&lt;/P&gt;&lt;P&gt;setting the clocks to maximum decreases the irq latency down to 408 ns. but it is still very high&lt;/P&gt;&lt;P&gt;rembember my irq handler has only two simple c source code lines. there is no stack variabe, etc.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Aug 2018 16:02:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846526#M1738</guid>
      <dc:creator>christiangradl</dc:creator>
      <dc:date>2018-08-27T16:02:31Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx rt1050 Interrupt Jitter</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846527#M1739</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/christiangradl"&gt;christiangradl&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;it would be may be good to see your assembly. By the way:&lt;/P&gt;&lt;P&gt;- what IDE do you use?&lt;/P&gt;&lt;P&gt;- what is your C compiler optimization level configuration?&lt;/P&gt;&lt;P&gt;- where is your stack located?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;regards&lt;/P&gt;&lt;P&gt;R.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Aug 2018 18:35:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/i-mx-rt1050-Interrupt-Jitter/m-p/846527#M1739</guid>
      <dc:creator>rastislav_pavlanin</dc:creator>
      <dc:date>2018-08-27T18:35:26Z</dc:date>
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