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    <title>i.MX RT Crossover MCUs中的主题 A multicore project problem</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1358667#M16786</link>
    <description>&lt;P&gt;CM4 memory&lt;/P&gt;&lt;P&gt;Flash Flash_00 &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Flash&amp;nbsp;&amp;nbsp; 0x30800000 0x800000&lt;BR /&gt;RAM SRAM_ITC_cm4&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x1ffe0000 0x20000&lt;BR /&gt;RAM DTCM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM2&amp;nbsp;&amp;nbsp; 0x20000000 0x20000&lt;BR /&gt;RAM rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM3&amp;nbsp;&amp;nbsp; 0x202c0000 0x2000&lt;BR /&gt;RAM NCACHE_REGION RAM4&amp;nbsp; 0x83000000 0x800000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;CM7 memory&lt;/P&gt;&lt;P&gt;Flash BOARD_FLASH&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; FLASH 0x30000000&amp;nbsp; 0x800000&lt;BR /&gt;RAM SRAM_DTC_cm7&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x20000000&amp;nbsp; 0x40000&lt;BR /&gt;RAM OCRAM_ITCM_ALIAS&amp;nbsp; RAM2 0x20200000&amp;nbsp; 0x20000&lt;BR /&gt;RAM rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM3 0x202c0000&amp;nbsp;&amp;nbsp; 0x2000&lt;BR /&gt;RAM NCACHE_REGION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM4 0x202c8000 &amp;nbsp; 0x8000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I compile CM7 project I get&lt;/P&gt;&lt;P&gt;evkmimxrt1160_hello_world_cm7.axf section `.data_RAM2_core_m4slave_text' will not fit in region `OCRAM_ITCM_ALIAS' evkmimxrt1160_hello_world_cm7&lt;BR /&gt;region `OCRAM_ITCM_ALIAS' overflowed by 3428 bytes evkmimxrt1160_hello_world_cm7&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Memory region Used Size Region Size %age Used&lt;BR /&gt;BOARD_FLASH: 169792 B 8 MB 2.02%&lt;BR /&gt;SRAM_DTC_cm7: 8544 B 256 KB 3.26%&lt;BR /&gt;OCRAM_ITCM_ALIAS: 134500 B 128 KB 102.62%&lt;BR /&gt;rpmsg_sh_mem: 0 GB 8 KB 0.00%&lt;BR /&gt;NCACHE_REGION: 0 GB 32 KB 0.00%&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And I see at the code&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/* Address of memory, from which the secondary core will boot */
#define CORE1_BOOT_ADDRESS (void *)0x20200000

/* Boot Secondary core application */
    (void)PRINTF("Starting Secondary core.\r\n");
    (void)MCMGR_StartCore(kMCMGR_Core1, (void *)(char *)CORE1_BOOT_ADDRESS, 2, kMCMGR_Start_Synchronous);
    (void)PRINTF("The secondary core application has been started.\r\n");&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why address 0x20200000? How should I change it?&lt;/P&gt;</description>
    <pubDate>Wed, 20 Oct 2021 12:59:27 GMT</pubDate>
    <dc:creator>john71</dc:creator>
    <dc:date>2021-10-20T12:59:27Z</dc:date>
    <item>
      <title>A multicore project problem</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1358667#M16786</link>
      <description>&lt;P&gt;CM4 memory&lt;/P&gt;&lt;P&gt;Flash Flash_00 &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Flash&amp;nbsp;&amp;nbsp; 0x30800000 0x800000&lt;BR /&gt;RAM SRAM_ITC_cm4&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x1ffe0000 0x20000&lt;BR /&gt;RAM DTCM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM2&amp;nbsp;&amp;nbsp; 0x20000000 0x20000&lt;BR /&gt;RAM rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM3&amp;nbsp;&amp;nbsp; 0x202c0000 0x2000&lt;BR /&gt;RAM NCACHE_REGION RAM4&amp;nbsp; 0x83000000 0x800000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;CM7 memory&lt;/P&gt;&lt;P&gt;Flash BOARD_FLASH&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; FLASH 0x30000000&amp;nbsp; 0x800000&lt;BR /&gt;RAM SRAM_DTC_cm7&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x20000000&amp;nbsp; 0x40000&lt;BR /&gt;RAM OCRAM_ITCM_ALIAS&amp;nbsp; RAM2 0x20200000&amp;nbsp; 0x20000&lt;BR /&gt;RAM rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM3 0x202c0000&amp;nbsp;&amp;nbsp; 0x2000&lt;BR /&gt;RAM NCACHE_REGION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM4 0x202c8000 &amp;nbsp; 0x8000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I compile CM7 project I get&lt;/P&gt;&lt;P&gt;evkmimxrt1160_hello_world_cm7.axf section `.data_RAM2_core_m4slave_text' will not fit in region `OCRAM_ITCM_ALIAS' evkmimxrt1160_hello_world_cm7&lt;BR /&gt;region `OCRAM_ITCM_ALIAS' overflowed by 3428 bytes evkmimxrt1160_hello_world_cm7&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Memory region Used Size Region Size %age Used&lt;BR /&gt;BOARD_FLASH: 169792 B 8 MB 2.02%&lt;BR /&gt;SRAM_DTC_cm7: 8544 B 256 KB 3.26%&lt;BR /&gt;OCRAM_ITCM_ALIAS: 134500 B 128 KB 102.62%&lt;BR /&gt;rpmsg_sh_mem: 0 GB 8 KB 0.00%&lt;BR /&gt;NCACHE_REGION: 0 GB 32 KB 0.00%&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And I see at the code&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/* Address of memory, from which the secondary core will boot */
#define CORE1_BOOT_ADDRESS (void *)0x20200000

/* Boot Secondary core application */
    (void)PRINTF("Starting Secondary core.\r\n");
    (void)MCMGR_StartCore(kMCMGR_Core1, (void *)(char *)CORE1_BOOT_ADDRESS, 2, kMCMGR_Start_Synchronous);
    (void)PRINTF("The secondary core application has been started.\r\n");&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why address 0x20200000? How should I change it?&lt;/P&gt;</description>
      <pubDate>Wed, 20 Oct 2021 12:59:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1358667#M16786</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2021-10-20T12:59:27Z</dc:date>
    </item>
    <item>
      <title>Re: A multicore project problem</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1359315#M16803</link>
      <description>&lt;P&gt;How do I share the memory between cores? How do I set in master CORE1_BOOT_ADDRESS?&lt;/P&gt;&lt;P&gt;And what does it mean?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="m4.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/159741i0CFAC4CA399D1475/image-size/medium?v=v2&amp;amp;px=400" role="button" title="m4.png" alt="m4.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;m4.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 21 Oct 2021 08:25:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1359315#M16803</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2021-10-21T08:25:32Z</dc:date>
    </item>
    <item>
      <title>Re: A multicore project problem</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1360287#M16832</link>
      <description>&lt;P&gt;Hi John,&lt;/P&gt;
&lt;P&gt;I recommend you to check the following application note, I think it will help you clarify most of your questions.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13264.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13264.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;/P&gt;
&lt;P&gt;Felipe&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;Note:&lt;/P&gt;
&lt;P&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored. Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;------------------------------------------------------------------------------&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 22 Oct 2021 23:22:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1360287#M16832</guid>
      <dc:creator>FelipeGarcia</dc:creator>
      <dc:date>2021-10-22T23:22:45Z</dc:date>
    </item>
    <item>
      <title>Re: A multicore project problem</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1360371#M16834</link>
      <description>&lt;P&gt;OK. Now it's compiled all good.&lt;/P&gt;&lt;P&gt;CM4 memory&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp; SRAM_ITC_cm4&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x1ffe0000&amp;nbsp;&amp;nbsp; 0x20000&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp; DTCM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x20000000 &amp;nbsp;0x20000&amp;nbsp;&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp; rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x202c0000&amp;nbsp; 0x2000&lt;STRONG&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp; NCACHE_REGION&amp;nbsp; 0x20240000&amp;nbsp; 0x10000&lt;/P&gt;&lt;P&gt;CM7 memory&lt;/P&gt;&lt;P&gt;Flash &amp;nbsp; BOARD_FLASH&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x30000000&amp;nbsp;&amp;nbsp; 0x1000000&lt;/P&gt;&lt;P&gt;RAM &amp;nbsp;SRAM_DTC_cm7 &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x20000000 &amp;nbsp; 0x40000&lt;/P&gt;&lt;P&gt;&amp;nbsp;RAM OCRAM_ITCM_ALIAS 0x20200000&amp;nbsp; 0x20000&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp; rpmsg_sh_mem&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x202c0000&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x2000&lt;/P&gt;&lt;P&gt;RAM&amp;nbsp;NCACHE_REGION &amp;nbsp; &amp;nbsp;&amp;nbsp; 0x83000000&amp;nbsp;&amp;nbsp; 0x800000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I start Debug this message pops-up first&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="error.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/159941iC1BAD4D675130CCF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="error.png" alt="error.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;error.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Then I get&lt;/P&gt;&lt;P&gt;MCUXpresso IDE RedlinkMulti Driver v11.4 (Sep 13 2021 15:04:52 - crt_emu_cm_redlink build 16)&lt;BR /&gt;Found chip XML file in D:/Workspace_MCUXpresso_11.4/evkmimxrt1160_hello_world_cm7/Debug\MIMXRT1166xxxxx.xml&lt;BR /&gt;( 5) Remote configuration complete&lt;BR /&gt;Reconnected to existing LinkServer process.&lt;BR /&gt;============= SCRIPT: RT1160_connect_M7_wake_M4.scp =============&lt;BR /&gt;RT1160 Connect M7 and Wake M4 Script&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;APID = 0x84770001&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;View cores on the DAP AP&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;============= END SCRIPT ========================================&lt;BR /&gt;Probe Firmware: DAPLink CMSIS-DAP (ARM)&lt;BR /&gt;Serial Number: 024400000208827100000000000000000000000097969905&lt;BR /&gt;VID:PID: 0D28:0204&lt;BR /&gt;USB Path: \\?\hid#vid_0d28&amp;amp;pid_0204&amp;amp;mi_03#9&amp;amp;350958c4&amp;amp;0&amp;amp;0000#{4d1e55b2-f16f-11cf-88cb-001111000030}&lt;BR /&gt;Using memory from core 0 after searching for a good core&lt;BR /&gt;connection failed - Em(04). Cannot provide power to DAP bus... Retrying&lt;BR /&gt;Failed on connect: Em(04). Cannot provide power to DAP bus.&lt;BR /&gt;Connected&amp;amp;Reset. Was: NotConnected. DpID: 6BA02477. CpuID: 00000000. Info: &amp;lt;None&amp;gt;&lt;BR /&gt;Last stub error 0: OK&lt;BR /&gt;Last sticky error: 0x0 AIndex: 0&lt;BR /&gt;Debug bus selected: MemAp 0&lt;BR /&gt;DAP Speed test unexecuted or failed&lt;BR /&gt;Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.&lt;BR /&gt;(100) Target Connection Failed&lt;BR /&gt;error closing down debug session - Nn(05). Wire ACK Fault in DAP access&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What should I do?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I connected an external debugger J-LINK and I get&lt;/P&gt;&lt;P&gt;J-Link is connected.&lt;BR /&gt;Device "MIMXRT1166XXX6_M7" selected.&lt;BR /&gt;Firmware: J-Link V10 compiled Aug 9 2021 10:30:48&lt;BR /&gt;Hardware: V10.10&lt;BR /&gt;S/N: 50119084&lt;BR /&gt;Feature(s): GDB&lt;BR /&gt;Checking target voltage...&lt;BR /&gt;Target voltage: 3.33 V&lt;BR /&gt;Listening on TCP/IP port 2331&lt;BR /&gt;Connecting to target...&lt;BR /&gt;ERROR: Could not connect to target.&lt;BR /&gt;Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...&lt;BR /&gt;Shutting down...&lt;BR /&gt;Could not connect to target.&lt;BR /&gt;Please check power, connection and settings.&lt;/P&gt;&lt;P&gt;Server has been shut down.&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 24 Oct 2021 09:58:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1360371#M16834</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2021-10-24T09:58:53Z</dc:date>
    </item>
    <item>
      <title>Re: A multicore project problem</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1365303#M16981</link>
      <description>&lt;P&gt;Hi John,&lt;/P&gt;
&lt;P&gt;Please follow section 4 of the AN for multicore debugging detailed steps.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Felipe&lt;/P&gt;</description>
      <pubDate>Tue, 02 Nov 2021 18:45:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/A-multicore-project-problem/m-p/1365303#M16981</guid>
      <dc:creator>FelipeGarcia</dc:creator>
      <dc:date>2021-11-02T18:45:28Z</dc:date>
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